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author | Jon Lin <jon.lin@rock-chips.com> | 2022-02-16 04:40:28 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2022-02-17 20:15:11 +0300 |
commit | 2fcdde56c44fe1cd13ce328128f509bbda2cdb41 (patch) | |
tree | 05ec9c06390221db4ba97841d4bce4a39e608a93 | |
parent | e882575efc771f130a24322377dc1033551da11d (diff) | |
download | linux-2fcdde56c44fe1cd13ce328128f509bbda2cdb41.tar.xz |
spi: rockchip: clear interrupt status in error handler
The interrupt status bit of the previous error data transmition will
affect the next operation and cause continuous SPI transmission failure.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20220216014028.8123-7-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | drivers/spi/spi-rockchip.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 8b4d56ee2193..cdc16eecaf6b 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -278,8 +278,9 @@ static void rockchip_spi_handle_err(struct spi_controller *ctlr, */ spi_enable_chip(rs, false); - /* make sure all interrupts are masked */ + /* make sure all interrupts are masked and status cleared */ writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); + writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); if (atomic_read(&rs->state) & TXDMA) dmaengine_terminate_async(ctlr->dma_tx); |