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authorJacopo Mondi <jacopo+renesas@jmondi.org>2017-08-24 11:48:41 +0300
committerSimon Horman <horms+renesas@verge.net.au>2017-09-19 12:19:48 +0300
commit2f8be2d1dadb2b73a1c1ce244c88c509791f5cf2 (patch)
treee472b535b9ce84a59640ec576f365ac22bc39d14
parentf7c68cdfebf6ad6b3c4d6b6c8966414219d035e3 (diff)
downloadlinux-2f8be2d1dadb2b73a1c1ce244c88c509791f5cf2.tar.xz
ARM: dts: gr-peach: Add SCIF2 pin group
Add pin configuration subnode for SCIF2 serial debug interface. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r7s72100-gr-peach.dts11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
index 1c40a1afbd8e..bcfa6445bbaa 100644
--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
+++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "r7s72100.dtsi"
+#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
/ {
model = "GR-Peach";
@@ -52,6 +53,13 @@
};
};
+&pinctrl {
+ scif2_pins: serial2 {
+ /* P6_2 as RxD2; P6_3 as TxD2 */
+ pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
+ };
+};
+
&extal_clk {
clock-frequency = <13333000>;
};
@@ -61,5 +69,8 @@
};
&scif2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&scif2_pins>;
+
status = "okay";
};