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authorMark F. Brown <mark.brown314@gmail.com>2010-09-04 02:28:08 +0400
committerEric Miao <eric.y.miao@gmail.com>2010-10-09 13:07:18 +0400
commit2ce4389068129fb4a8756b5ba126da1260f5dbef (patch)
treeb364266c3635b6077b354d1b7a316183f01e9f00
parent6d109465fb751fe4376c080e5fb10838d3414c28 (diff)
downloadlinux-2ce4389068129fb4a8756b5ba126da1260f5dbef.tar.xz
ARM: pxa168: added wake clear register support for APMU
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
index 919030514120..ac4702357a6e 100644
--- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -33,4 +33,16 @@
#define APMU_FNRST_DIS (1 << 1)
#define APMU_AXIRST_DIS (1 << 0)
+/* Wake Clear Register */
+#define APMU_WAKE_CLR APMU_REG(0x07c)
+
+#define APMU_PXA168_KP_WAKE_CLR (1 << 7)
+#define APMU_PXA168_CFI_WAKE_CLR (1 << 6)
+#define APMU_PXA168_XD_WAKE_CLR (1 << 5)
+#define APMU_PXA168_MSP_WAKE_CLR (1 << 4)
+#define APMU_PXA168_SD4_WAKE_CLR (1 << 3)
+#define APMU_PXA168_SD3_WAKE_CLR (1 << 2)
+#define APMU_PXA168_SD2_WAKE_CLR (1 << 1)
+#define APMU_PXA168_SD1_WAKE_CLR (1 << 0)
+
#endif /* __ASM_MACH_REGS_APMU_H */