diff options
| author | Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | 2026-03-11 10:48:16 +0300 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | 2026-05-07 12:38:46 +0300 |
| commit | 2c7d48c75c90b42facdeaa9e06a21220fcdc8809 (patch) | |
| tree | 931e9a188986a3373cf3a37a9b4de7476d3c3ff8 | |
| parent | b8eed179f08f57de15ad681b294adc422663d455 (diff) | |
| download | linux-2c7d48c75c90b42facdeaa9e06a21220fcdc8809.tar.xz | |
drm/bridge: tc358768: Add LP mode command support
Currently the driver ignores MIPI_DSI_MODE_LPM and always uses HS mode.
Add code to enable HS mode in pre_enable() only if MIPI_DSI_MODE_LPM is
not set, and always enable HS mode in enable() for video transmission.
Tested-by: João Paulo Gonçalves <joao.goncalves@toradex.com> # Toradex Verdin AM62
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://patch.msgid.link/20260311-tc358768-v2-5-e75a99131bd5@ideasonboard.com
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
| -rw-r--r-- | drivers/gpu/drm/bridge/tc358768.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index a276fbc75dde..a7a14c125ac4 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -1091,7 +1091,8 @@ static void tc358768_bridge_atomic_pre_enable(struct drm_bridge *bridge, /* Configure DSI_Control register */ val = (dsi_dev->lanes - 1) << 1; - val |= TC358768_DSI_CONTROL_TXMD; + if (!(dsi_dev->mode_flags & MIPI_DSI_MODE_LPM)) + val |= TC358768_DSI_CONTROL_TXMD; if (!(dsi_dev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) val |= TC358768_DSI_CONTROL_HSCKMD; @@ -1123,6 +1124,11 @@ static void tc358768_bridge_atomic_enable(struct drm_bridge *bridge, return; } + /* Enable HS mode for video TX */ + tc358768_confw_update_bits(priv, TC358768_DSI_CONTROL, + TC358768_DSI_CONTROL_TXMD, + TC358768_DSI_CONTROL_TXMD); + /* clear FrmStop and RstPtr */ tc358768_update_bits(priv, TC358768_PP_MISC, 0x3 << 14, 0); |
