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authorJulia Lawall <Julia.Lawall@inria.fr>2022-05-21 14:10:49 +0300
committerBorislav Petkov <bp@suse.de>2022-05-21 17:03:49 +0300
commit2aeb1f5fbbacbe159690ef7338503f323b0d4f46 (patch)
tree19c33870ce29de19f7ec81b430012c67f7f061da
parent2edb9863e12566259503b2695d1c252c775b0ee7 (diff)
downloadlinux-2aeb1f5fbbacbe159690ef7338503f323b0d4f46.tar.xz
EDAC/xgene: Fix typo processsors -> processors
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20220521111145.81697-39-Julia.Lawall@inria.fr
-rw-r--r--drivers/edac/xgene_edac.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/xgene_edac.c b/drivers/edac/xgene_edac.c
index 7197f9fa0245..54081403db4f 100644
--- a/drivers/edac/xgene_edac.c
+++ b/drivers/edac/xgene_edac.c
@@ -501,7 +501,7 @@ static int xgene_edac_mc_remove(struct xgene_edac_mc_ctx *mcu)
#define MEMERR_L2C_L2ESRA_PAGE_OFFSET 0x0804
/*
- * Processor Module Domain (PMD) context - Context for a pair of processsors.
+ * Processor Module Domain (PMD) context - Context for a pair of processors.
* Each PMD consists of 2 CPUs and a shared L2 cache. Each CPU consists of
* its own L1 cache.
*/