diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-04-16 20:44:40 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-04-21 13:09:55 +0300 |
| commit | 2423bd7e73f326c06be883f18e4620a5fd32f467 (patch) | |
| tree | 8f814630cbb4786c997db38652304ada7bf1c3c9 | |
| parent | 861e31fb433083ffcc62e1f87f3b694c5fe8a5e6 (diff) | |
| download | linux-2423bd7e73f326c06be883f18e4620a5fd32f467.tar.xz | |
drm/i915: Introduce pin_params.needs_cpu_lmem_access
Add a new flag pin_params.neeeds_cpu_lmem_access so that the
low level pinning code doesn't need to peek into the display
driver's framebuffer structure.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260416174448.28264-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_fb_pin.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 |
3 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h index e6271437459d..bcf5a1f46092 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h @@ -19,6 +19,7 @@ struct intel_fb_pin_params { unsigned int alignment; unsigned int phys_alignment; unsigned int vtd_guard; + bool needs_cpu_lmem_access; }; struct i915_vma * diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c index 780be25ad43b..96ffc4b0d809 100644 --- a/drivers/gpu/drm/i915/i915_fb_pin.c +++ b/drivers/gpu/drm/i915/i915_fb_pin.c @@ -61,7 +61,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, * ensure it is always in the mappable part of lmem, if this is * a small-bar device. */ - if (intel_fb_needs_cpu_access(fb)) + if (pin_params->needs_cpu_lmem_access) flags &= ~I915_BO_ALLOC_GPU_ONLY; ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0, flags); @@ -275,6 +275,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state, .alignment = intel_plane_fb_min_alignment(plane_state), .phys_alignment = intel_plane_fb_min_phys_alignment(plane_state), .vtd_guard = intel_plane_fb_vtd_guard(plane_state), + .needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base), }; int fence_id = -1; @@ -289,6 +290,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state, struct intel_fb_pin_params pin_params = { .view = &plane_state->view.gtt, .alignment = intel_plane_fb_min_alignment(plane_state), + .needs_cpu_lmem_access = intel_fb_needs_cpu_access(&fb->base), }; vma = i915_dpt_pin_to_ggtt(fb->dpt, pin_params.alignment / 512); diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c index 205492639dba..a4eb06cfa769 100644 --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c @@ -335,7 +335,7 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, refcount_set(&vma->ref, 1); if (IS_DGFX(to_xe_device(bo->ttm.base.dev)) && - intel_fb_needs_cpu_access(&fb->base) && + pin_params->needs_cpu_lmem_access && !(bo->flags & XE_BO_FLAG_NEEDS_CPU_ACCESS)) { struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram; @@ -474,6 +474,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state, struct intel_fb_pin_params pin_params = { .view = &new_plane_state->view.gtt, .alignment = plane->min_alignment(plane, fb, 0), + .needs_cpu_lmem_access = intel_fb_needs_cpu_access(fb), }; if (reuse_vma(new_plane_state, old_plane_state)) |