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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2025-02-27 16:40:49 +0300
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2025-04-19 17:09:11 +0300
commit236d500c67e26ab3a7b58d4a90fde182f7c57279 (patch)
treefe85a989b819ecc7d850400978eeceeb92b222ba
parent985b22d2f88cba382345b373322b669d75ec50fc (diff)
downloadlinux-236d500c67e26ab3a7b58d4a90fde182f7c57279.tar.xz
dt-bindings: PCI: qcom,pcie-sa8775p: Add 'global' interrupt
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-7-2b70a7819d1e@linaro.org
-rw-r--r--Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml10
1 files changed, 7 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
index efde49d1bef8..e3fa232da2ca 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
@@ -45,9 +45,10 @@ properties:
interrupts:
minItems: 8
- maxItems: 8
+ maxItems: 9
interrupt-names:
+ minItems: 8
items:
- const: msi0
- const: msi1
@@ -57,6 +58,7 @@ properties:
- const: msi5
- const: msi6
- const: msi7
+ - const: global
resets:
maxItems: 1
@@ -129,7 +131,8 @@ examples:
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0",
"msi1",
"msi2",
@@ -137,7 +140,8 @@ examples:
"msi4",
"msi5",
"msi6",
- "msi7";
+ "msi7",
+ "global";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,