diff options
| author | Aravind Anilraj <aravindanilraj0702@gmail.com> | 2026-03-29 10:06:41 +0300 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2026-05-26 20:27:53 +0300 |
| commit | 1fac72873549bbdd6292014d9676bcf1c39cf285 (patch) | |
| tree | c2a1e7b19706a89982fc5a370e79645cf37b55ff | |
| parent | e7ae89a0c97ce2b68b0983cd01eda67cf373517d (diff) | |
| download | linux-1fac72873549bbdd6292014d9676bcf1c39cf285.tar.xz | |
thermal: intel: int340x: Fix potential shift overflow in ptc_mmio_write()
The value parameter is u32 but is shifted into a u64 register value
without casting first. If the shift amount pushes bits beyond 32, they
are lost. Cast value to u64 before shifting to ensure all bits are
preserved.
Signed-off-by: Aravind Anilraj <aravindanilraj0702@gmail.com>
Link: https://patch.msgid.link/20260329070642.10721-2-aravindanilraj0702@gmail.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
| -rw-r--r-- | drivers/thermal/intel/int340x_thermal/platform_temperature_control.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c b/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c index 0ccc72c93499..18ac5014d8dc 100644 --- a/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c +++ b/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c @@ -138,7 +138,7 @@ static void ptc_mmio_write(struct pci_dev *pdev, u32 offset, int index, u32 valu reg_val = readq((void __iomem *) (proc_priv->mmio_base + offset)); reg_val &= ~mask; - reg_val |= (value << ptc_mmio_regs[index].shift); + reg_val |= ((u64)value << ptc_mmio_regs[index].shift); writeq(reg_val, (void __iomem *) (proc_priv->mmio_base + offset)); } |