diff options
| author | Xiang-Bin Shi <eric91102091@gmail.com> | 2026-01-23 10:57:19 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-02-03 00:01:07 +0300 |
| commit | 171efc70097a9f5f207461bed03478a1b0a3dfa6 (patch) | |
| tree | cdc060529cd5ac7c626c48f24bc6d22014979ab0 | |
| parent | d55c571e4333fac71826e8db3b9753fadfbead6a (diff) | |
| download | linux-171efc70097a9f5f207461bed03478a1b0a3dfa6.tar.xz | |
x86/ibs: Fix typo in dc_l2tlb_miss comment
The comment for dc_l2tlb_miss incorrectly describes it as a "hit".
This contradicts the field name and the actual bit definition.
Fix the comment to correctly describe it as a "miss".
Signed-off-by: Xiang-Bin Shi <eric91102091@gmail.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260123075719.160734-1-eric91102091@gmail.com
| -rw-r--r-- | arch/x86/include/asm/amd/ibs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/amd/ibs.h b/arch/x86/include/asm/amd/ibs.h index 3ee5903982c2..fcc8a5abe54e 100644 --- a/arch/x86/include/asm/amd/ibs.h +++ b/arch/x86/include/asm/amd/ibs.h @@ -110,7 +110,7 @@ union ibs_op_data3 { __u64 ld_op:1, /* 0: load op */ st_op:1, /* 1: store op */ dc_l1tlb_miss:1, /* 2: data cache L1TLB miss */ - dc_l2tlb_miss:1, /* 3: data cache L2TLB hit in 2M page */ + dc_l2tlb_miss:1, /* 3: data cache L2TLB miss in 2M page */ dc_l1tlb_hit_2m:1, /* 4: data cache L1TLB hit in 2M page */ dc_l1tlb_hit_1g:1, /* 5: data cache L1TLB hit in 1G page */ dc_l2tlb_hit_2m:1, /* 6: data cache L2TLB hit in 2M page */ |