diff options
| author | Marc Kleine-Budde <mkl@pengutronix.de> | 2026-03-19 19:55:39 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-04-07 13:54:27 +0300 |
| commit | 1712be8623b2befe4556da320b3f06a767ca5339 (patch) | |
| tree | b61239106ca3695137e6670f72f725c7b3d2e4e9 | |
| parent | b191fbf446bcabe310d3d9ac759e4a071b74186d (diff) | |
| download | linux-1712be8623b2befe4556da320b3f06a767ca5339.tar.xz | |
spi: spi-fsl-lpspi: fsl_lpspi_set_cmd(): remove obfuscated and obsolete assignment of TCR_CPOL and SPI_CPHA
Commit 7ae4d097b752 ("spi: spi-fsl-lpspi: Handle clock polarity and phase")
enhances the driver with clock polarity and phase handling.
Among other things that commit in fsl_lpspi_set_cmd() explicitly set the
bits TCR_CPOL and TCR_CPHA bits in the TCR register depending on their
corresponding bits in the SPI mode (SPI_CPOL and SPI_CPHA), to configure
clock polarity and phase.
That change made the assignment of the lowest 2 bits of lpspi_config::mode
shifted by << 30 to the TCR register obsolete. The lowest 2 bits of struct
lpspi_config::mode (= SPI_CPOL and SPI_CPHA) match the corresponding bits
in the TCR register (TCR_CPOL and TCR_CPHA) if shifted.
Keep the better readable and maintainable version provided in commit
7ae4d097b752 ("spi: spi-fsl-lpspi: Handle clock polarity and phase") and
remove the obfuscated version.
Cc: Marek Vasut <marex@nabladev.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://patch.msgid.link/20260319-spi-fsl-lpspi-cleanups-v2-5-02b56c5d44a8@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-fsl-lpspi.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 0b6c7b9c8ffa..f35273d389c8 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -289,7 +289,6 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi) u32 temp = 0; temp |= fsl_lpspi->config.bpw - 1; - temp |= (fsl_lpspi->config.mode & 0x3) << 30; temp |= (fsl_lpspi->config.chip_select & 0x3) << 24; if (!fsl_lpspi->is_target) { temp |= fsl_lpspi->config.prescale << 27; |