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| author | Marc Zyngier <maz@kernel.org> | 2026-04-01 13:36:02 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2026-04-01 17:42:26 +0300 |
| commit | 170a77b4185a87cc7e02e404d22b9bf3f9923884 (patch) | |
| tree | e684d5f2b745b2d69c0043c7a31c1c2f344ccd11 | |
| parent | e63d0a32e7368f3eb935755db87add1bf000ea90 (diff) | |
| download | linux-170a77b4185a87cc7e02e404d22b9bf3f9923884.tar.xz | |
KVM: arm64: vgic-v5: Transfer edge pending state to ICH_PPI_PENDRx_EL2
While it is perfectly correct to leave the pending state of a level
interrupt as is when queuing it (it is, after all, only driven by
the line), edge pending state must be transfered, as nothing will
lower it.
Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Fixes: 4d591252bacb2 ("KVM: arm64: gic-v5: Implement PPI interrupt injection")
Link: https://sashiko.dev/#/patchset/20260319154937.3619520-1-sascha.bischoff%40arm.com
Link: https://patch.msgid.link/20260401103611.357092-8-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
| -rw-r--r-- | arch/arm64/kvm/vgic/vgic-v5.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm64/kvm/vgic/vgic-v5.c b/arch/arm64/kvm/vgic/vgic-v5.c index 119d7d01d0e7..422741c86c6a 100644 --- a/arch/arm64/kvm/vgic/vgic-v5.c +++ b/arch/arm64/kvm/vgic/vgic-v5.c @@ -445,8 +445,11 @@ void vgic_v5_flush_ppi_state(struct kvm_vcpu *vcpu) irq = vgic_get_vcpu_irq(vcpu, intid); - scoped_guard(raw_spinlock_irqsave, &irq->irq_lock) + scoped_guard(raw_spinlock_irqsave, &irq->irq_lock) { __assign_bit(i, pendr, irq_is_pending(irq)); + if (irq->config == VGIC_CONFIG_EDGE) + irq->pending_latch = false; + } vgic_put_irq(vcpu->kvm, irq); } |