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| author | Rob Herring (Arm) <robh@kernel.org> | 2025-12-16 21:01:37 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2025-12-22 13:03:58 +0300 |
| commit | 15e3ce53673289624bab4e6a60207af4775f4a38 (patch) | |
| tree | 0e5c96edcb45707610fc2dc6fa4c9153732f0ac9 | |
| parent | 22fbe6e21450d629642e4bdc8d8d329219abeb46 (diff) | |
| download | linux-15e3ce53673289624bab4e6a60207af4775f4a38.tar.xz | |
arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk"
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251216180136.2794105-2-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi index cc860a80af51..70430cb2b053 100644 --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi @@ -401,16 +401,16 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x87e0 0x24000000 0x0 0x1000>; interrupts = <1 21 4>; - clocks = <&refclk50mhz>; - clock-names = "apb_pclk"; + clocks = <&refclk50mhz>, <&refclk50mhz>; + clock-names = "uartclk", "apb_pclk"; }; uaa1: serial@87e025000000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x87e0 0x25000000 0x0 0x1000>; interrupts = <1 22 4>; - clocks = <&refclk50mhz>; - clock-names = "apb_pclk"; + clocks = <&refclk50mhz>, <&refclk50mhz>; + clock-names = "uartclk", "apb_pclk"; }; }; }; |