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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2020-05-29 14:13:18 +0300 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2020-06-26 09:35:08 +0300 |
| commit | 0d0245b99552aa8c5c67d34ab7b4f0fd4d174444 (patch) | |
| tree | 3b4a3acdc498b9845ab02df9a242262dffb6181b | |
| parent | 2f36bae11234b5a9ca018bc44fff0e847cacc33c (diff) | |
| download | linux-0d0245b99552aa8c5c67d34ab7b4f0fd4d174444.tar.xz | |
mtd: rawnand: toshiba: Implement ->choose_interface_config() for TC58NVG0S3E
This chip supports ONFI SDR timing mode 2, implement the new hook to
advertize it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-25-miquel.raynal@bootlin.com
| -rw-r--r-- | drivers/mtd/nand/raw/nand_ids.c | 3 | ||||
| -rw-r--r-- | drivers/mtd/nand/raw/nand_toshiba.c | 20 |
2 files changed, 21 insertions, 2 deletions
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index e0dbc2e316c7..c729a8bc895d 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -28,8 +28,7 @@ struct nand_flash_dev nand_flash_ids[] = { */ {"TC58NVG0S3E 1G 3.3V 8-bit", { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} }, - SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), - 2 }, + SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), }, {"TC58NVG2S0F 4G 3.3V 8-bit", { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} }, SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) }, diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c index d23bb4322062..6d53f9b7a817 100644 --- a/drivers/mtd/nand/raw/nand_toshiba.c +++ b/drivers/mtd/nand/raw/nand_toshiba.c @@ -203,6 +203,15 @@ tc58teg5dclta00_choose_interface_config(struct nand_chip *chip, return nand_choose_best_sdr_timings(chip, iface, NULL); } +static int +tc58nvg0s3e_choose_interface_config(struct nand_chip *chip, + struct nand_interface_config *iface) +{ + onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, 2); + + return nand_choose_best_sdr_timings(chip, iface, NULL); +} + static int tc58teg5dclta00_init(struct nand_chip *chip) { struct mtd_info *mtd = nand_to_mtd(chip); @@ -215,6 +224,14 @@ static int tc58teg5dclta00_init(struct nand_chip *chip) return 0; } +static int tc58nvg0s3e_init(struct nand_chip *chip) +{ + chip->ops.choose_interface_config = + &tc58nvg0s3e_choose_interface_config; + + return 0; +} + static int toshiba_nand_init(struct nand_chip *chip) { if (nand_is_slc(chip)) @@ -227,6 +244,9 @@ static int toshiba_nand_init(struct nand_chip *chip) if (!strcmp("TC58TEG5DCLTA00", chip->parameters.model)) tc58teg5dclta00_init(chip); + if (!strncmp("TC58NVG0S3E", chip->parameters.model, + sizeof("TC58NVG0S3E") - 1)) + tc58nvg0s3e_init(chip); return 0; } |