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| author | Fugang Duan <fugang.duan@nxp.com> | 2026-01-18 19:28:02 +0300 |
|---|---|---|
| committer | Frank Li <Frank.Li@nxp.com> | 2026-02-23 20:49:01 +0300 |
| commit | 09a38b6f101aaac7cd66ec4af818484f79b1ee20 (patch) | |
| tree | 4b955d430be31a9730245ec65305ccb16a4de8a4 | |
| parent | 193be56821bc417d14e28a58d2502bcf37c318e1 (diff) | |
| download | linux-09a38b6f101aaac7cd66ec4af818484f79b1ee20.tar.xz | |
arm64: dts: imx8mm-evk: add uart3 port
Add uart3 port.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi index 30b13b4d630f..8be44eaf4e1e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -627,6 +627,15 @@ status = "okay"; }; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + assigned-clocks = <&clk IMX8MM_CLK_UART3>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; + uart-has-rtscts; + status = "okay"; +}; + &usbphynop1 { wakeup-source; }; @@ -819,6 +828,15 @@ >; }; + pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140 + MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140 + MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140 + MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140 + >; + }; + pinctrl_usdhc2_gpio: usdhc2grpgpiogrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4 |