diff options
| author | Konrad Dybcio <quic_kdybcio@quicinc.com> | 2024-09-19 01:57:21 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-10-06 05:52:56 +0300 |
| commit | 05bd9923d15e8508cd0fa4f3d03437df1a9362aa (patch) | |
| tree | 65fb55552da51563c33667624af82152f8c110cd | |
| parent | 7abe72765d9f6a900a1c2b6c12b9dd70010a8b0b (diff) | |
| download | linux-05bd9923d15e8508cd0fa4f3d03437df1a9362aa.tar.xz | |
arm64: dts: qcom: sm8150: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent
pagetable walk via the IDR0 register. This however is not respected by
the arm-smmu driver unless dma-coherent is set.
Mark the node as dma-coherent to ensure this (and other) implementations
take this coherency into account.
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp)
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3
Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-8-5b3a8662403d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 27f87835bc55..28e57ad885f4 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -4296,6 +4296,7 @@ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; + dma-coherent; }; remoteproc_adsp: remoteproc@17300000 { |