diff options
| author | Antoine Tenart <antoine.tenart@bootlin.com> | 2019-07-24 11:17:09 +0300 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-08-24 17:17:33 +0300 |
| commit | 048dc3abe82738567435d9caa106a20eb417b28a (patch) | |
| tree | 7d22e326eaf4ba1b728293f6ea9540286719b20f | |
| parent | ed90302be64a53d9031c8ce05428c358b16a5d96 (diff) | |
| download | linux-048dc3abe82738567435d9caa106a20eb417b28a.tar.xz | |
MIPS: dts: mscc: describe the PTP register range
This patch adds one register range within the mscc,vsc7514-switch node,
to describe the PTP registers.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: davem@davemloft.net
Cc: richardcochran@gmail.com
Cc: alexandre.belloni@bootlin.com
Cc: UNGLinuxDriver@microchip.com
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: netdev@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: thomas.petazzoni@bootlin.com
Cc: allan.nielsen@microchip.com
| -rw-r--r-- | arch/mips/boot/dts/mscc/ocelot.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi index 33ae74aaa1bb..1e55a778def5 100644 --- a/arch/mips/boot/dts/mscc/ocelot.dtsi +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi @@ -120,6 +120,7 @@ reg = <0x1010000 0x10000>, <0x1030000 0x10000>, <0x1080000 0x100>, + <0x10e0000 0x10000>, <0x11e0000 0x100>, <0x11f0000 0x100>, <0x1200000 0x100>, @@ -134,7 +135,7 @@ <0x1800000 0x80000>, <0x1880000 0x10000>, <0x1060000 0x10000>; - reg-names = "sys", "rew", "qs", "port0", "port1", + reg-names = "sys", "rew", "qs", "ptp", "port0", "port1", "port2", "port3", "port4", "port5", "port6", "port7", "port8", "port9", "port10", "qsys", "ana", "s2"; |