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| author | Kathiravan T <quic_kathirav@quicinc.com> | 2022-02-08 18:35:25 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-02-11 03:12:05 +0300 |
| commit | 3d44861d006b18649306cbade242c865e9068b6e (patch) | |
| tree | 9e88e0c5e13f526a995ff66f5edd57596893f8fb /.gitignore | |
| parent | 59892de947f0ca1d65426f7a6c6e258863fa65d7 (diff) | |
| download | linux-3d44861d006b18649306cbade242c865e9068b6e.tar.xz | |
arm64: dts: qcom: ipq6018: enable the GICv2m support
GIC used in the IPQ6018 SoCs has one instance of the GICv2m extension,
which supports upto 32 MSI interrupts. Lets add support for the same.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644334525-11577-3-git-send-email-quic_kathirav@quicinc.com
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions