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The coreboot bootloader always passes information about the boot mode
since commit [1]. Use the new coreboot table when present to update
the bootmode. When the table is not present or contains unknown values
the bootmode is not updated.
This allows to support UEFI capsule updates that need the whole SPI flash
to be unlocked. Since this is also a security concern the payload
should never follow the regular boot flow, but reboot the system when done.
1: https://review.coreboot.org/c/coreboot/+/94094/
TEST=Can update the system using UEFI capsule on disk. coreboot detects the
capsule and unlocks the SPI flash, sets the boot mode to
LB_BOOT_MODE_FLASH_UPDATE and UefiPayload updates BootMode in the HOB
handoff table allowing the capsule update code to run.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
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In coreboot the SMBIOS table generation is optional. When no
SMBIOS tables where found UefiPayloadEntry creates a HOB, but
doesn't initialize the contents.
The gUniversalPayloadSmbiosTableGuid HOB is then used by SmbiosDxe
and it crashes when the pointer in the HOB doesn't point to mapped
DRAM.
Fix that by only creating gUniversalPayloadSmbiosTableGuid HOB
when SMBIOS tables where found.
TEST=Can boot using UEFIPayload when coreboot doesn't provide
SMBIOS tables.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
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Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.
`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.
Compared to macro-based include guards, `#pragma once`:
- Eliminates the risk of macro name collisions or copy/paste errors
where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
(e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
file entirely, rather than re-reading it to find the matching
`#endif` ("multiple-include optimization").
- Note that some compilers may already optimize traditional include
guards, by recognzining the idiomatic pattern.
This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.
However, this is considered acceptable given:
1. edk2 already defines a subset of supported compilers in
BaseTools/Conf/tools_def.template, all of which have supported
`#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
include guard naming and potential macro collisions.
Approximate compiler support dates:
- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
(http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
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Add missing EFIAPI to BL_CAPSULE_CALLBACK to fix build issue.
Fixes: cc149a8e
Signed-off-by: Khalid Ali <khaliidcaliy@gmail.com>
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This is a newly added helper library to help providing utilities common
to UefiPayloadPkg.
This change will pave ways to separating standard services such as
"MemoryAllocation" into its own library classes.
Signed-off-by: Kun Qin <kun.qin@microsoft.com>
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This allows reusing SMMSTORE protocol for the purpose of firmware
updates.
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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The implementation is for CbParseLib, SblParseLib returns success while
doing nothing.
The HOBs created by BuildCvHob() will be eventually picked up and
processed in DXE phase by
MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleProcessLib.c
Because multiple capsules can be chained (simply by placing them one
after another), coreboot passes them as a single memory range which can
provide tenths of capsules.
coreboot won't pass any capsules unless it finds CapsuleUpdateData*
EFI variables and is able to parse memory ranges they point to as
scatter-gather lists of pages containing capsules.
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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The implementation is for CbParseLib, SblParseLib returns an error.
coreboot's CB_TAG_FW_INFO is a machine-friendly version of a system
firmware component. A component is identified by a GUID. This is meant
to be primarily a source of information for ESRT.
The following coreboot options translate directly into fields of the
structure with information:
- CONFIG_DRIVERS_EFI_MAIN_FW_GUID
- CONFIG_DRIVERS_EFI_MAIN_FW_VERSION
- CONFIG_DRIVERS_EFI_MAIN_FW_LSV
- CONFIG_ROM_SIZE
The first 3 options depend on CONFIG_DRIVERS_EFI_FW_INFO.
Version as a string depends on CONFIG_LOCALVERSION as well as version of
the code base (misnamed as KERNELVERSION in coreboot's build system).
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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Implement all of the FVB protocol functions on top of the SmmStore
as a library. The library consumes the introduced
gEfiSmmStoreInfoHobGuid.
The SMI handler uses a fixed communication buffer in reserved DRAM.
To initiate a transaction you must write to the I/O APM_CNT port.
Tests on Intel(R) Xeon(R) E-2288G CPU @ 3.70G showed that the SMI isn't
triggered with a probability of 1:40 of all cases when called in a tight
loop. The CPU continues running and the SMI is triggered asynchronously
a few clock cycles later. coreboot only handles synchronous APM request
and does nothing on asynchronous APM triggers.
As there's no livesign from SMM it's impossible to tell if the handler
has run. Just wait a bit and try again to trigger a synchronous SMI.
Tests confirmed that out of 5 million tries the SMI is now always
handled.
When a synchronous SMI happens with the correct write to the APM_CNT
port, the ebx register is checked first that it doesn't point to SMRAM.
If it doesn't it's used to read in the arguments that define an SmmStore
transaction.
The SMI handler will only operate on a predefined and memory mapped
region in the boot media.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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Add a new InfoHob that contains the SmmStore information passed from
coreboot tables when the SMMSTOREV2 feature is enabled.
This will be used to implement the FVB on top of the SMI installed by
coreboot.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786
Initialize mUartInfo with PCD for debug message
when Hob was not available.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786
Add Library header, DeviceTree hob header and PCD definitions.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737
Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760
Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
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SystemTableInfo GUID is not a Spec defined GUID.
The latest SBL and CBL produces ACPI and SMBIOS table information.
So removing the SystemTableInfo GUID implementation.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Guo Dong <guo.dong@intel.com>
Signed-off-by: Thiyagu Kesavan Balakrishnan <thiyagux.kesavan.balakrishnan@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
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This library provides FlashDeviceLib APIs based on
SpiFlashLib and consumed by FVB driver.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
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This is a common SPI Flash library used for the Intel platform that
supports SPI hardware sequence. This library provides actual SPI flash
operation via Intel PCH SPI controller.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
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V2: Fix more header files on #ifdef variable
ECC reported some issues on UefiPayloadPkg, this patch fixed
most of them except several files including ElfLib\Elf32.h,
coreboot.h, CbParseLib.c, etc.
It also removed unused functions in ResetSystemLib and Hob.c.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
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Fixes simple typo, no behavioral change.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
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Current UefiPayloadPkg can suport PCI root bridge info HOB
provided by bootloader. For UniversalPayload, bootloader can
directly provide this HOB for payload consumption. However,
for legacy UEFI payload, it is required to migrate the HOB
information from bootloader HOB space to UEFI payload HOB
space. This patch added the missing part for the bootloader
ParseLib in order to support both legacy and universal UEFI
payload.
This patch was tested on Slim Bootloader with latest UEFI
payload, and it worked as expected.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
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Remove asm code used for payload entry.
Use patchable PCD instead a fixed PCD PcdPayloadStackTop to avoid
potential conflict.
Based on the removal, use same HobLib regardless UNIVERSAL_PAYLOAD.
Use same PlatformHookLib regardless UNIVERSAL_PAYLOAD. The original
PlatformHookLib was removed and UniversalPayloadPlatformHookLib was
rename to new PlatformHookLib.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
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For payload entry, use PayloadEntryHobLib as HobLib and payload entry
should initialize hob base.
For DxeCore, use new added DxeHobLib as HobLib, and DxeCore will
initialize hob base.
For Dxe Driver, use new added DxeHobLib as HobLib, and use DxeHobListLib
to initialize hob base.
Adding a new library DxeHobLib + DxeHobListLib instead of using the
DxeHobLib.inf in MdePkg is because the constructor needed be separated
from DxeHobLib.
If not, when building UefiPayloadPkg, the dependency chain is as below:
DebugLib -> SerialPortLib -> PlatformHookLib -> HobLib -> DebugLib
Each library has a constructor, and this becomes a constructor circle.
To break the circle, separate the constructor from the HobLib as a new
DxeHobListLib, which won't depend on DebugLib.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Signed-off-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3100
It is not necessary to have a PEI phase in the UEFI payload since no
specific PEI task is required. This patch adds a UefiPayloadEntry
driver to get UEFI Payload required information from the bootloaders,
convert them into a HOB list, load DXE core and transfer control to it.
Here is the change details:
1) Removed PEI phase, including Peicore, BlSupportPei, SecCore, etc.
2) Added UefiPayloadEntry driver. this is the only driver before DXE core.
3) Added Pure X64 support, dropped Pure IA32 (Could add later if required)
64bit payload with 32bit entry point is still supported.
4) Use one DSC file UefiPayloadPkg.dsc to support X64 and IA32X64 build.
Removed UefiPayloadIa32.dsc and UefiPayloadIa32X64.dsc
Tested with SBL and coreboot on QEMU.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
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CorebootModulePkg and CorebootPayloadPkg originally supports coreboot only.
In order to support other bootloaders, such as Slim Bootloader, they need
be updated to be more generic.
UEFI Payload (UefiPayloadPkg) a converged package from CorebootModulePkg
and CorebootPayloadPkg with following updates:
a. Support both coreboot and Slim Bootloader
b. Removed SataControllerDxe and BaseSerialPortLib16550 to use EDK2 modules
c. Support passing bootloader parameter to UEFI payload, e.g. coreboot
table from coreboot or HOB list from Slim Bootloader
d. Using GraphicsOutputDxe from EDK2 with minor change instead of FbGop
e. Remove the dependency to IntelFrameworkPkg and IntelFrameworkModulePkg
and QuarkSocPkg
f. Use BaseDebugLibSerialPort library as DebugLib
g. Use HPET timer, drop legacy 8254 timer support
h. Use BaseXApicX2ApicLib instead of BaseXApicLib
i. Remove HOB gUefiFrameBufferInfoGuid to use EDK2 graphics HOBs.
j. Other clean ups
On how UefiPayloadPkg could work with coreboot/Slim Bootloader, please
refer UefiPayloadPkg/BuildAndIntegrationInstructions.txt
Once UefiPayloadPkg is checked-in, CorebootModulePkg and CorebootPayloadPkg
could be retired.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
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