| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2022-05-31 | IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call for X64 Calling Convention | Duggapu, Chinni B | 1 | -1/+3 | |
| REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3926 Pass Input parameters using RCX. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Signed-off-by: cbduggap <chinni.b.duggapu@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Ted Kuo <ted.kuo@intel.com> | |||||
| 2022-04-16 | IntelFsp2WrapperPkg: SecFspWrapperPlatformSecLibSample support for X64 | Ted Kuo | 3 | -0/+393 | |
| REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3893 1.Added SecFspWrapperPlatformSecLibSample support for X64. 2.Adopted FSPT_ARCH2_UPD in SecFspWrapperPlatformSecLibSample. 3.Moved Fsp.h up one level to be shared across IA32 and X64. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com> | |||||
