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2026-02-24IntelFsp2Pkg: Replace include guards with #pragma onceMichael Kubacki1-3/+1
Replace traditional `#ifndef`/`#define`/`#endif` include guards with `#pragma` once. `#pragma once` is a widely supported preprocessor directive that prevents header files from being included multiple times. It is supported by all toolchains used to build edk2: GCC, Clang/LLVM, and MSVC. Compared to macro-based include guards, `#pragma once`: - Eliminates the risk of macro name collisions or copy/paste errors where two headers inadvertently use the same guard macro. - Eliminate inconsistency in the way include guard macros are named (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.). - Reduces boilerplate (three lines replaced by one). - Avoids polluting the macro namespace with guard symbols. - Can improve build times as the preprocessor can skip re-opening the file entirely, rather than re-reading it to find the matching `#endif` ("multiple-include optimization"). - Note that some compilers may already optimize traditional include guards, by recognzining the idiomatic pattern. This change is made acknowledging that overall portability of the code will technically be reduced, as `#pragma once` is not part of the C/C++ standards. However, this is considered acceptable given: 1. edk2 already defines a subset of supported compilers in BaseTools/Conf/tools_def.template, all of which have supported `#pragma once` for over two decades. 2. There have been concerns raised to the project about inconsistent include guard naming and potential macro collisions. Approximate compiler support dates: - MSVC: Supported since Visual C++ 4.2 (1996) - GCC: Supported since 3.4 (2004) (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html) - Clang (LLVM based): Since initial release in 2007 Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
2025-06-13IntelFsp2Pkg: Add Fsp notify phase checkHongbin1 Zhang1-9/+18
This change included following two changes: 1. Add Fsp notify phase check, it will hang if bootloader call FSP with wrong phase 2. Remove FspMode check, due to just API mode will run the code, no need to check Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Ted Kuo <ted.kuo@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
2022-04-16IntelFsp2Pkg: X64 compatible changes to support PEI in 64bitTed Kuo1-1/+2
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893 1.Added EFIAPI to FspNotifyPhasePeimEntryPoint, SwapStack and PEI_CORE_ENTRY. 2.Treat both MAX_ADDRESS and MAX_UINT32 as invalid address for FSP global data in FspApiCallingCheck(). 3.Changed AsmReadEsp to AsmReadStackPointer. 4.Changed the type of the return value of AsmReadStackPointer from UINT32 to UINTN. 5.Changed the type of TemporaryMemoryBase, PermenentMemoryBase and BootLoaderStack from UINT32 to UINTN. 6.Some type casting to pointers are UINT32. Changed them to UINTN to accommodate both IA32 and X64. 7.Corrected some typos. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2021-12-07IntelFsp2Pkg: Apply uncrustify changesMichael Kubacki1-22/+22
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the IntelFsp2Pkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2019-04-09IntelFsp2Pkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney3-21/+3
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2018-10-19IntelFsp2Pkg: Support FSP Dispatch modeChasel, Chiu2-24/+38
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1241 Add support for both API (original mode) and DISPATCH mode: 1. Add FspMode field from reserved byte of Global Data Structure to tell which mode is selected by boot loader. If boot loader invoking FSP-M API this field will remain as default 0 (API mode), otherwise platform FSP should set this field to 1 (Dispatch mode) when initializing Global Data Structure. 2. gFspInApiModePpiGuid will be instaled when FSP running in API mode and modules only for API mode should have this in depex. 3. If it is DISPATCH mode, FSP will return to PEI dispatcher, not directly return to boot loader. 4. DISPATCH mode supports DXE NotifyPhase drivers so FSP will not wait for PEI NotifyPhase callbacks, instead it will install gFspReadyForNotifyPhasePpiGuid PPI for platform to complete late initialization before transferring to DXE. Test: Verified FSP API and DISPATCH modes on 2 internal platforms and both boot successfully. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2018-06-28IntelFsp2Pkg: Clean up source filesLiming Gao1-5/+5
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2017-10-10IntelFsp2Pkg: Update Section Name in INF filesLiming Gao1-2/+1
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-24IntelFsp2Pkg: Use FspSiliconInitDone2 APIThomaiyar, Richard Marian1-1/+1
Use FspSiliconInitDone2 API in Notify Phase Cc: Maurice Ma <maurice.ma@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Richard Thomaiyar <richard.marian.thomaiyar@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-05-13Add IntelFsp2Pkg and IntelFsp2WrapperPkg.Jiewen Yao3-0/+214
Add FSP2.0 support. This series of patch is to support FSP2.0 specification at https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf Some major updates include: 1) One FSP binary is separated to multiple components: FSP-T, FSP-M, FSP-S, and optional FSP-O. Each component has its own configuration data region. 2) All FSP-APIs use same UPD format - FSP_UPD_HEADER. 3) Add EnumInitPhaseEndOfFirmware notifyphase. 4) FSP1.1/FSP1.0 compatibility is NOT maintained. 5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg, to indicate that it is for FspWrapper only. IntelFspPkg and IntelFspWrapperPkg will be deprecated. The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg and IntelFsp2WrapperPkg. The old platform can still use IntelFspPkg and IntelFspWrapperPkg for compatibility consideration. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>