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| author | Jiaxin Wu <jiaxin.wu@intel.com> | 2024-09-02 09:52:14 +0300 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-09-06 11:41:49 +0300 |
| commit | b4820f2d6591357d7e6f35b5e5340300d3be790f (patch) | |
| tree | 578c653089b5d3422ab944ffb907a1e0e90debcc /UefiCpuPkg | |
| parent | 633a755d99d8f889c4e3ed74cf558b16e6a67251 (diff) | |
| download | edk2-b4820f2d6591357d7e6f35b5e5340300d3be790f.tar.xz | |
UefiCpuPkg/PiSmmCpuDxeSmm: Clean mCpuSmmRestrictedMemoryAccess
Currently, mCpuSmmRestrictedMemoryAccess is only used by the
IsRestrictedMemoryAccess(). And IsRestrictedMemoryAccess() can
consume the PcdCpuSmmRestrictedMemoryAccess directly. Therefore,
mCpuSmmRestrictedMemoryAccess can be cleaned to simply the code
logic.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index fb1f237c12..4043e26955 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -15,7 +15,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent LIST_ENTRY mPagePool = INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);
BOOLEAN m1GPageTableSupport = FALSE;
-BOOLEAN mCpuSmmRestrictedMemoryAccess;
X86_ASSEMBLY_PATCH_LABEL gPatch5LevelPagingNeeded;
/**
@@ -207,10 +206,9 @@ SmmInitPageTable ( //
InitializeSpinLock (mPFLock);
- mCpuSmmRestrictedMemoryAccess = PcdGetBool (PcdCpuSmmRestrictedMemoryAccess);
- m1GPageTableSupport = Is1GPageSupport ();
- m5LevelPagingNeeded = Is5LevelPagingNeeded ();
- mPhysicalAddressBits = CalculateMaximumSupportAddress (m5LevelPagingNeeded);
+ m1GPageTableSupport = Is1GPageSupport ();
+ m5LevelPagingNeeded = Is5LevelPagingNeeded ();
+ mPhysicalAddressBits = CalculateMaximumSupportAddress (m5LevelPagingNeeded);
PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded, 1);
if (m5LevelPagingNeeded) {
mPagingMode = m1GPageTableSupport ? Paging5Level1GB : Paging5Level;
@@ -220,7 +218,6 @@ SmmInitPageTable ( DEBUG ((DEBUG_INFO, "5LevelPaging Needed - %d\n", m5LevelPagingNeeded));
DEBUG ((DEBUG_INFO, "1GPageTable Support - %d\n", m1GPageTableSupport));
- DEBUG ((DEBUG_INFO, "PcdCpuSmmRestrictedMemoryAccess - %d\n", mCpuSmmRestrictedMemoryAccess));
DEBUG ((DEBUG_INFO, "PhysicalAddressBits - %d\n", mPhysicalAddressBits));
//
@@ -881,5 +878,5 @@ IsRestrictedMemoryAccess ( VOID
)
{
- return mCpuSmmRestrictedMemoryAccess;
+ return PcdGetBool (PcdCpuSmmRestrictedMemoryAccess);
}
|