MdePkg/BaseLib: Support IMPCTL1, IMPCTL2 and TLBRPRMD on LoongArchHEADmaster

Add CsrRead(), CsrWrite() and CsrXChg() support for IMPCTL1 (0x80),
IMPCTL2 (0x81) and TLBRPRMD (0x8F). These selectors currently reach
the unsupported-selector trap instead of a CSR instruction.

Define the register numbers, add the IMPCTL1/2 dispatch range and
extend the existing TLB refill range and instruction tables through
TLBRPRMD. Preserve the existing handling of all other selectors.

The register definitions follow LoongArch Reference Manual Volume 1,
version 1.10, sections 7.4.18, 7.4.19 and 7.5.17. IMPCTL field semantics
remain implementation-specific; this change only enables CSR access.

Link: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>

1 files changed, 7 insertions, 0 deletions

diff --git a/MdePkg/Include/Register/LoongArch64/Csr.h b/MdePkg/Include/Register/LoongArch64/Csr.h
index c2728bf393..a0bf389ab8 100644
--- a/MdePkg/Include/Register/LoongArch64/Csr.h
+++ b/MdePkg/Include/Register/LoongArch64/Csr.h
@@ -146,6 +146,12 @@
 #define LOONGARCH_CSR_TINTCLR        0x44    // Timer interrupt clear

 

 //

+// Implementation control registers

+//

+#define LOONGARCH_CSR_IMPCTL1  0x80

+#define LOONGARCH_CSR_IMPCTL2  0x81

+

+//

 // TLB refill exception base address

 //

 #define LOONGARCH_CSR_TLBREBASE  0x88    // TLB refill exception entry

@@ -155,6 +161,7 @@
 #define LOONGARCH_CSR_TLBRELO0   0x8c    // TLB refill entrylo0

 #define LOONGARCH_CSR_TLBRELO1   0x8d    // TLB refill entrylo1

 #define LOONGARCH_CSR_TLBREHI    0x8e    // TLB refill entryhi

+#define LOONGARCH_CSR_TLBRPRMD   0x8F    // TLB refill pre-exception mode

 

 //

 // Direct map windows registers