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| author | Chao Li <lichao@loongson.cn> | 2024-08-29 10:51:31 +0300 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-08-30 22:54:01 +0300 |
| commit | 2fe24171acec5e032cc19ce6b958d3274062d00d (patch) | |
| tree | 11e63c4d4ab21889c89c6dfd836516520ce5c863 /BaseTools/Source/Python/Trim/Trim.py | |
| parent | a066ca16d348122b160b407008d77ea6329fe6f3 (diff) | |
| download | edk2-2fe24171acec5e032cc19ce6b958d3274062d00d.tar.xz | |
UefiCpuPkg: Using the new name of LoongArch CSR 0x20 register
Since the LoongArch SPEC has adjusted the CSR 0x20 register name and
the MdePkg also added the new name, so enable it in UefiCpuPkg.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Diffstat (limited to 'BaseTools/Source/Python/Trim/Trim.py')
0 files changed, 0 insertions, 0 deletions