summaryrefslogtreecommitdiff
path: root/BaseTools/Source/Python/Table/TableQuery.py
diff options
context:
space:
mode:
authorLiming Gao <liming.gao@intel.com>2018-01-11 12:05:14 +0300
committerLiming Gao <liming.gao@intel.com>2018-01-16 18:42:58 +0300
commit1c7a65eba749ff62e5ba425c5e40e23cfd1de245 (patch)
tree1715860072e64184f4039e999367afbdf1d99f5d /BaseTools/Source/Python/Table/TableQuery.py
parent2db0ccc2d7fef249487f95db41042943c0617f54 (diff)
downloadedk2-1c7a65eba749ff62e5ba425c5e40e23cfd1de245.tar.xz
UefiCpuPkg: Update SmmCpuFeatureLib pass XCODE5 tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=849 In V2, use "mov rax, strict qword 0" to replace the hard code db. 1. Use lea instruction to get the address instead of mov instruction. 2. Use the dummy address as jmp destination, and add the logic to fix up the address to the absolute address at boot time. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/Table/TableQuery.py')
0 files changed, 0 insertions, 0 deletions