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authorLeo Duran <leo.duran@amd.com>2017-02-26 20:43:07 +0300
committerStar Zeng <star.zeng@intel.com>2017-03-01 07:53:03 +0300
commit241f914975d50e34f6da57d1e5ac60eedb5d52de (patch)
tree1d619fc53b2170008dd92f7eef0ddbf8ffe071a7 /BaseTools/Source/Python/Ecc/Database.py
parentab1a5a58c95937998f3ecf384a8940130511e234 (diff)
downloadedk2-241f914975d50e34f6da57d1e5ac60eedb5d52de.tar.xz
UefiCpuPkg/PiSmmCpuDxeSmm: Add support for PCD PcdPteMemoryEncryptionAddressOrMask
This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. The mask is applied when page tables entriees are created or modified. CC: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
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