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authorMaurice Ma <maurice.ma@intel.com>2016-10-17 20:48:04 +0300
committerMaurice Ma <maurice.ma@intel.com>2016-10-19 08:21:53 +0300
commit0613ccbd1357b1f6aecab27a2e72dde328d36f6d (patch)
tree5d888fb69cb94f2b0f6faa0be140b542e5219ec1 /BaseTools/Source/Python/Common/InfClassObject.py
parent201fbce6fbc69ebb53cc5b1b263059051e561e86 (diff)
downloadedk2-0613ccbd1357b1f6aecab27a2e72dde328d36f6d.tar.xz
CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limit
The current PCI resource limit calculation in CorebootPayloadPkg PciHostBridgeLib is wrong. Adjusted it to match the PciHostBridge driver's expectation. Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by : Prince Agyeman <prince.agyeman@intel.com>
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