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/** @file
Copyright (C) 2008-2025 Advanced Micro Devices, Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef CPU_REGISTERS_DEF_H_
#define CPU_REGISTERS_DEF_H_
#undef BIT0
#undef BIT1
#undef BIT2
#undef BIT3
#undef BIT4
#undef BIT5
#undef BIT6
#undef BIT7
#undef BIT8
#undef BIT9
#undef BIT10
#undef BIT10
#undef BIT11
#undef BIT12
#undef BIT13
#undef BIT14
#undef BIT15
#undef BIT16
#undef BIT17
#undef BIT18
#undef BIT19
#undef BIT20
#undef BIT21
#undef BIT22
#undef BIT23
#undef BIT24
#undef BIT25
#undef BIT26
#undef BIT27
#undef BIT28
#undef BIT29
#undef BIT30
#undef BIT31
#undef BIT32
#undef BIT33
#undef BIT34
#undef BIT35
#undef BIT36
#undef BIT37
#undef BIT38
#undef BIT39
#undef BIT40
#undef BIT41
#undef BIT42
#undef BIT43
#undef BIT44
#undef BIT45
#undef BIT46
#undef BIT47
#undef BIT48
#undef BIT49
#undef BIT40
#undef BIT41
#undef BIT42
#undef BIT43
#undef BIT44
#undef BIT45
#undef BIT46
#undef BIT47
#undef BIT48
#undef BIT49
#undef BIT50
#undef BIT51
#undef BIT52
#undef BIT53
#undef BIT54
#undef BIT55
#undef BIT56
#undef BIT57
#undef BIT58
#undef BIT59
#undef BIT60
#undef BIT61
#undef BIT62
#undef BIT63
#define BIT0 0x0000000000000001ull
#define BIT1 0x0000000000000002ull
#define BIT2 0x0000000000000004ull
#define BIT3 0x0000000000000008ull
#define BIT4 0x0000000000000010ull
#define BIT5 0x0000000000000020ull
#define BIT6 0x0000000000000040ull
#define BIT7 0x0000000000000080ull
#define BIT8 0x0000000000000100ull
#define BIT9 0x0000000000000200ull
#define BIT10 0x0000000000000400ull
#define BIT11 0x0000000000000800ull
#define BIT12 0x0000000000001000ull
#define BIT13 0x0000000000002000ull
#define BIT14 0x0000000000004000ull
#define BIT15 0x0000000000008000ull
#define BIT16 0x0000000000010000ull
#define BIT17 0x0000000000020000ull
#define BIT18 0x0000000000040000ull
#define BIT19 0x0000000000080000ull
#define BIT20 0x0000000000100000ull
#define BIT21 0x0000000000200000ull
#define BIT22 0x0000000000400000ull
#define BIT23 0x0000000000800000ull
#define BIT24 0x0000000001000000ull
#define BIT25 0x0000000002000000ull
#define BIT26 0x0000000004000000ull
#define BIT27 0x0000000008000000ull
#define BIT28 0x0000000010000000ull
#define BIT29 0x0000000020000000ull
#define BIT30 0x0000000040000000ull
#define BIT31 0x0000000080000000ull
#define BIT32 0x0000000100000000ull
#define BIT33 0x0000000200000000ull
#define BIT34 0x0000000400000000ull
#define BIT35 0x0000000800000000ull
#define BIT36 0x0000001000000000ull
#define BIT37 0x0000002000000000ull
#define BIT38 0x0000004000000000ull
#define BIT39 0x0000008000000000ull
#define BIT40 0x0000010000000000ull
#define BIT41 0x0000020000000000ull
#define BIT42 0x0000040000000000ull
#define BIT43 0x0000080000000000ull
#define BIT44 0x0000100000000000ull
#define BIT45 0x0000200000000000ull
#define BIT46 0x0000400000000000ull
#define BIT47 0x0000800000000000ull
#define BIT48 0x0001000000000000ull
#define BIT49 0x0002000000000000ull
#define BIT50 0x0004000000000000ull
#define BIT51 0x0008000000000000ull
#define BIT52 0x0010000000000000ull
#define BIT53 0x0020000000000000ull
#define BIT54 0x0040000000000000ull
#define BIT55 0x0080000000000000ull
#define BIT56 0x0100000000000000ull
#define BIT57 0x0200000000000000ull
#define BIT58 0x0400000000000000ull
#define BIT59 0x0800000000000000ull
#define BIT60 0x1000000000000000ull
#define BIT61 0x2000000000000000ull
#define BIT62 0x4000000000000000ull
#define BIT63 0x8000000000000000ull
#define MSR_MMIO_CFG_BASE 0xC0010058ul // MMIO Configuration Base Address Register
#endif // CPU_REGISTERS_DEF_H_
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