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-rw-r--r--Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc12
-rw-r--r--Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc8
-rw-r--r--Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf4
3 files changed, 24 insertions, 0 deletions
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
index d8d137c5a8..d620f0bf8a 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
@@ -157,7 +157,11 @@
#
!if $(ENABLE_STMM) == TRUE
## MM Communicate
+!if $(ENABLE_FIRMWARE_UPDATE) == TRUE
+ gArmTokenSpaceGuid.PcdMmBufferBase|0xFBF00000
+!else
gArmTokenSpaceGuid.PcdMmBufferBase|0xFEF00000
+!endif
gArmTokenSpaceGuid.PcdMmBufferSize|0x10000
!endif
@@ -275,8 +279,16 @@
# Normal pseudo crbs which locality from 0 to 3 are allocated
# at the start of System Memory.
#
+!if $(ENABLE_FIRMWARE_UPDATE) == TRUE
+ #
+ # When ENABLE_FIRMWARE_UPDATE, TZC DRAM size is 64MB.
+ #
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0xfbf10000
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmMaxAddress|0xfbf13fff
+!else
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0xfef10000
gEfiSecurityPkgTokenSpaceGuid.PcdTpmMaxAddress|0xfef13fff
+!endif
gEfiSecurityPkgTokenSpaceGuid.PcdTpmCrbRegionSize|0x4000
gArmVExpressTokenSpaceGuid.PcdTpmUseSipSmc|FALSE
gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdGenTpm2DeviceTable|TRUE
diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
index c117d86866..223d13d0cb 100644
--- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
+++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
@@ -104,8 +104,16 @@
# at the start of System Memory.
# These regions are reserved by TF-A.
#
+!if $(ENABLE_FIRMWARE_UPDATE) == TRUE
+ #
+ # When ENABLE_FIRMWARE_UPDATE, TZC DRAM size is 64MB.
+ #
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0xfbf10000
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmMaxAddress|0xfbf13fff
+!else
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0xfef10000
gEfiSecurityPkgTokenSpaceGuid.PcdTpmMaxAddress|0xfef13fff
+!endif
gEfiSecurityPkgTokenSpaceGuid.PcdTpmCrbRegionSize|0x4000
#
diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf
index 78d5ad3a75..eeba208e8b 100644
--- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf
+++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf
@@ -20,7 +20,11 @@
[FD.BL32_AP_MM]
# See macro definition BL32_BASE in TF-A code at include/plat/arm/common/arm_def.h
+!if $(ENABLE_FIRMWARE_UPDATE)
+BaseAddress = 0xfc200000|gArmTokenSpaceGuid.PcdFdBaseAddress
+!else
BaseAddress = 0xff200000|gArmTokenSpaceGuid.PcdFdBaseAddress
+!endif
# Maximum size of BL32 Image in TF-A (see include/plat/arm/common/arm_spm.def.h)
Size = 0x00300000|gArmTokenSpaceGuid.PcdFdSize