Renormalized end-of-lines from master@5fdbccd742d4206a2370a08c5420a1aa8c6ad85btrunk

1 files changed, 40 insertions, 40 deletions

diff --git a/Silicon/Marvell/Armada7k8k/DeviceTree/armada-7040.dtsi b/Silicon/Marvell/Armada7k8k/DeviceTree/armada-7040.dtsi
index 30c2e4e..588d600 100644
--- a/Silicon/Marvell/Armada7k8k/DeviceTree/armada-7040.dtsi
+++ b/Silicon/Marvell/Armada7k8k/DeviceTree/armada-7040.dtsi
@@ -1,40 +1,40 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

-/*

- * Copyright (C) 2016 Marvell Technology Group Ltd.

- *

- * Device Tree file for the Armada 7040 SoC, made of an AP806 Quad and

- * one CP110.

- */

-

-#include "armada-ap806-quad.dtsi"

-#include "armada-70x0.dtsi"

-

-/ {

-        model = "Marvell Armada 7040";

-        compatible = "marvell,armada7040", "marvell,armada-ap806-quad",

-                     "marvell,armada-ap806";

-};

-

-&cp0_pcie0 {

-        iommu-map =

-                <0x0   &smmu 0x480 0x20>,

-                <0x100 &smmu 0x4a0 0x20>,

-                <0x200 &smmu 0x4c0 0x20>;

-        iommu-map-mask = <0x031f>;

-};

-

-&cp0_sata0 {

-        iommus = <&smmu 0x444>;

-};

-

-&cp0_sdhci0 {

-        iommus = <&smmu 0x445>;

-};

-

-&cp0_usb3_0 {

-        iommus = <&smmu 0x440>;

-};

-

-&cp0_usb3_1 {

-        iommus = <&smmu 0x441>;

-};

+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * Device Tree file for the Armada 7040 SoC, made of an AP806 Quad and
+ * one CP110.
+ */
+
+#include "armada-ap806-quad.dtsi"
+#include "armada-70x0.dtsi"
+
+/ {
+        model = "Marvell Armada 7040";
+        compatible = "marvell,armada7040", "marvell,armada-ap806-quad",
+                     "marvell,armada-ap806";
+};
+
+&cp0_pcie0 {
+        iommu-map =
+                <0x0   &smmu 0x480 0x20>,
+                <0x100 &smmu 0x4a0 0x20>,
+                <0x200 &smmu 0x4c0 0x20>;
+        iommu-map-mask = <0x031f>;
+};
+
+&cp0_sata0 {
+        iommus = <&smmu 0x444>;
+};
+
+&cp0_sdhci0 {
+        iommus = <&smmu 0x445>;
+};
+
+&cp0_usb3_0 {
+        iommus = <&smmu 0x440>;
+};
+
+&cp0_usb3_1 {
+        iommus = <&smmu 0x441>;
+};