Platform/Qemu/Sbsa: Update TF-A binaries to enable Neoverse-N1

Update the TF-A binaries to have Neoverse-N1 support.

This support was merged into TF-A:

https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19863

This allows SBSA Reference Platform to use Arm v8.2 cpu without using
"max" cpu.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>

3 files changed, 18 insertions, 35 deletions

diff --git a/Platform/Qemu/Sbsa/Readme.md b/Platform/Qemu/Sbsa/Readme.md
index c7ced43..aaf920e 100644
--- a/Platform/Qemu/Sbsa/Readme.md
+++ b/Platform/Qemu/Sbsa/Readme.md
@@ -4,49 +4,32 @@ Qemu SBSA TF-A binaries
 These binaries have been created from the mainline TF-A
 code checked out at the following commit ID:
 
-commit 6264643a0711faef346cbbb6e3d928a198aeaf31
-Merge: d9248e851 cb3e9650f
-Author: Manish V Badarkhe <manish.badarkhe@arm.com>
-Date:   Fri Feb 3 17:04:42 2023 +0100
+commit 5fdb2e5471c6ae564ea60d986505418134e7516f
+Merge: e550fa127 ccc61e100
+Author: Olivier Deprez <olivier.deprez@arm.com>
+Date:   Tue Mar 21 10:46:41 2023 +0100
 
-    Merge "refactor(tc): update total compute gpu device node" into integration
+    Merge changes I924ea85d,I22e128c4,I7a5cfaac into integration
 
+    * changes:
+      feat(mt8195): add support for SMC from OP-TEE
+      feat(mediatek): add SMC handler for EMI MPU
+      feat(mediatek): add SiP service for OP-TEE
 
-This ensures that the following fix for qemu_sbsa platform is
+This ensures that the following feature for qemu_sbsa platform is
 merged upstream and is included in the build:
 
-commit 9bff7ce37545162d417953ac36c6878216815b94
-Author: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
-Date:   Wed Nov 16 14:47:51 2022 +0100
+commit 226f4c8e35c4441e80ad523b9105eab4ca630396
+Author: Chen Baozi <chenbaozi@phytium.com.cn>
+Date:   Wed Feb 22 06:58:39 2023 +0000
 
-    fix(qemu-sbsa): enable SVE and SME
+    feat(qemu): add "neoverse-n1" cpu support
 
-    Commit 337ff4f1dd6604738d79fd3fa275ae74d74256b2 enabled SVE/SME for
-    qemu platform. Let do the same for qemu-sbsa one too.
+    Add support to qemu "neoverse-n1" cpu for "qemu_sbsa" ('sbsa-ref')
+    platform.
 
-    With this change I can boot Debian 'bookworm' installed using Max cpu.
-
-    Info from referenced commit:
-
-    Starting with QEMU v3.1.0 (Dec 2018), QEMU's TCG emulation engine supports
-    the SVE architecture extension. In QEMU v7.1.0 (Aug 2022) it also gained
-    SME support.
-
-    As it stands today, running TF-A under QEMU with "-cpu max" makes Linux
-    hang, because SME and SVE accesses trap to EL3, but are never handled
-    there. This is because the Linux kernel sees the SVE or SME feature bits,
-    and assumes firmware has enabled the feature for lower exception levels.
-    This requirement is described in the Linux kernel booting protocol.
-
-    Enable those features in the TF-A build, so that BL31 does the proper
-    EL3 setup to make the feature usable in non-secure world.
-    We check the actual feature bits before accessing SVE or SME registers,
-    so this is safe even for older QEMU version or when not running with
-    -cpu max. As SVE and SME are AArch64 features only, do not enable them
-    when building for AArch32.
-
-    Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
-    Change-Id: I9ea1f91e6b801218d944e8a7d798d5ae568ed59a
+    Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
+    Change-Id: I4620e879c71115451ae91a1643812d89ec7c071f
 
 
 NOTE: No modifications to the source code have been done.
diff --git a/Platform/Qemu/Sbsa/bl1.bin b/Platform/Qemu/Sbsa/bl1.bin
index 7166078..51b2251 100755
--- a/Platform/Qemu/Sbsa/bl1.bin
+++ b/Platform/Qemu/Sbsa/bl1.bin
diff --git a/Platform/Qemu/Sbsa/fip.bin b/Platform/Qemu/Sbsa/fip.bin
index 29e0925..bf00f9b 100644
--- a/Platform/Qemu/Sbsa/fip.bin
+++ b/Platform/Qemu/Sbsa/fip.bin