1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188
4189
4190
4191
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260
4261
4262
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352
4353
4354
4355
4356
4357
4358
4359
4360
4361
4362
4363
4364
4365
4366
4367
4368
4369
4370
4371
4372
4373
4374
4375
4376
4377
4378
4379
4380
4381
4382
4383
4384
4385
4386
4387
4388
4389
4390
4391
4392
4393
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416
4417
4418
4419
4420
4421
4422
4423
4424
4425
4426
4427
4428
4429
4430
4431
4432
4433
4434
4435
4436
4437
4438
4439
4440
4441
4442
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452
4453
4454
4455
4456
4457
4458
4459
4460
4461
4462
4463
4464
4465
4466
4467
4468
4469
4470
4471
4472
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482
4483
4484
4485
4486
4487
4488
4489
4490
4491
4492
4493
4494
4495
4496
4497
4498
4499
4500
4501
4502
4503
4504
4505
4506
4507
4508
4509
4510
4511
4512
4513
4514
4515
4516
4517
4518
4519
4520
4521
4522
4523
4524
4525
4526
4527
4528
4529
4530
4531
4532
4533
4534
4535
4536
4537
4538
4539
4540
4541
4542
4543
4544
4545
4546
4547
4548
4549
4550
4551
4552
4553
4554
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564
4565
4566
4567
4568
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592
4593
4594
4595
4596
4597
4598
4599
4600
4601
4602
4603
4604
4605
4606
4607
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620
4621
4622
4623
4624
4625
4626
4627
4628
4629
4630
4631
4632
4633
4634
4635
4636
4637
4638
4639
4640
4641
4642
4643
4644
4645
4646
4647
4648
4649
4650
4651
4652
4653
4654
4655
4656
4657
4658
4659
4660
4661
4662
4663
4664
4665
4666
4667
4668
4669
4670
4671
4672
4673
4674
4675
4676
4677
4678
4679
4680
4681
4682
4683
4684
4685
4686
4687
4688
4689
4690
4691
4692
4693
4694
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705
4706
4707
4708
4709
4710
4711
4712
4713
4714
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728
4729
4730
4731
4732
4733
4734
4735
4736
4737
4738
4739
4740
4741
4742
4743
4744
4745
4746
4747
4748
4749
4750
4751
4752
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762
4763
4764
4765
4766
4767
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777
4778
4779
4780
4781
4782
4783
4784
4785
4786
4787
4788
4789
4790
4791
4792
4793
4794
4795
4796
4797
4798
4799
4800
4801
4802
4803
4804
4805
4806
4807
4808
4809
4810
4811
4812
4813
4814
4815
4816
4817
4818
4819
4820
4821
4822
4823
4824
4825
4826
4827
4828
4829
4830
4831
4832
4833
4834
4835
4836
4837
4838
4839
4840
4841
4842
4843
4844
4845
4846
4847
4848
4849
4850
4851
4852
4853
4854
4855
4856
4857
4858
4859
4860
4861
4862
4863
4864
4865
4866
4867
4868
4869
4870
4871
4872
4873
4874
4875
4876
4877
4878
4879
4880
4881
4882
4883
4884
4885
4886
4887
4888
4889
4890
4891
4892
4893
4894
4895
4896
4897
4898
4899
4900
4901
4902
4903
4904
4905
4906
4907
4908
4909
4910
4911
4912
4913
4914
4915
4916
4917
4918
4919
4920
4921
4922
4923
4924
4925
4926
4927
4928
4929
4930
4931
4932
4933
4934
4935
4936
4937
4938
4939
4940
4941
4942
4943
4944
4945
4946
4947
4948
4949
4950
4951
4952
4953
4954
4955
4956
4957
4958
4959
4960
4961
4962
4963
4964
4965
4966
4967
4968
4969
4970
4971
4972
4973
4974
4975
4976
4977
4978
4979
4980
4981
4982
4983
4984
4985
4986
4987
4988
4989
4990
4991
4992
4993
4994
4995
4996
4997
4998
4999
5000
5001
5002
5003
5004
5005
5006
5007
5008
5009
5010
5011
5012
5013
5014
5015
5016
5017
5018
5019
5020
5021
5022
5023
5024
5025
5026
5027
5028
5029
5030
5031
5032
5033
5034
5035
5036
5037
5038
5039
5040
5041
5042
5043
5044
5045
5046
5047
5048
5049
5050
5051
5052
5053
5054
5055
5056
5057
5058
5059
5060
5061
5062
5063
5064
5065
5066
5067
5068
5069
5070
5071
5072
5073
5074
5075
5076
5077
5078
5079
5080
5081
5082
5083
5084
5085
5086
5087
5088
5089
5090
5091
5092
5093
5094
5095
5096
5097
5098
5099
5100
5101
5102
5103
5104
5105
5106
5107
5108
5109
5110
5111
5112
5113
5114
5115
5116
5117
5118
5119
5120
5121
5122
5123
5124
5125
5126
5127
5128
5129
5130
5131
5132
5133
5134
5135
5136
5137
5138
5139
5140
5141
5142
5143
5144
5145
5146
5147
5148
5149
5150
5151
5152
5153
5154
5155
5156
5157
5158
5159
5160
5161
5162
5163
5164
5165
5166
5167
5168
5169
5170
5171
5172
5173
5174
5175
5176
5177
5178
5179
5180
5181
5182
5183
5184
5185
5186
5187
5188
5189
5190
5191
5192
5193
5194
5195
5196
5197
5198
5199
5200
5201
5202
5203
5204
5205
5206
5207
5208
5209
5210
5211
5212
5213
5214
5215
5216
5217
5218
5219
5220
5221
5222
5223
5224
5225
5226
5227
5228
5229
5230
5231
5232
5233
5234
5235
5236
5237
5238
5239
5240
5241
5242
5243
5244
5245
5246
5247
5248
5249
5250
5251
5252
5253
5254
5255
5256
5257
5258
5259
5260
5261
5262
5263
5264
5265
5266
5267
5268
5269
5270
5271
5272
5273
5274
5275
5276
5277
5278
5279
5280
5281
5282
5283
5284
5285
5286
5287
5288
5289
5290
5291
5292
5293
5294
5295
5296
5297
5298
5299
5300
5301
5302
5303
5304
5305
5306
5307
5308
5309
5310
5311
5312
5313
5314
5315
5316
5317
5318
5319
5320
5321
5322
5323
5324
5325
5326
5327
5328
5329
5330
5331
5332
5333
5334
5335
5336
5337
5338
5339
5340
5341
5342
5343
5344
5345
5346
5347
5348
5349
5350
5351
5352
5353
5354
5355
5356
5357
5358
5359
5360
5361
5362
5363
5364
5365
5366
5367
5368
5369
5370
5371
5372
5373
5374
5375
5376
5377
5378
5379
5380
5381
5382
5383
5384
5385
5386
5387
5388
5389
5390
5391
5392
5393
5394
5395
5396
5397
5398
5399
5400
5401
5402
5403
5404
5405
5406
5407
5408
5409
5410
5411
5412
5413
5414
5415
5416
5417
5418
5419
5420
5421
5422
5423
5424
5425
5426
5427
5428
5429
5430
5431
5432
5433
5434
5435
5436
5437
5438
5439
5440
5441
5442
5443
5444
5445
5446
5447
5448
5449
5450
5451
5452
5453
5454
5455
5456
5457
5458
5459
5460
5461
5462
5463
5464
5465
5466
5467
5468
5469
5470
5471
5472
5473
5474
5475
5476
5477
5478
5479
5480
5481
5482
5483
5484
5485
5486
5487
5488
5489
5490
5491
5492
5493
5494
5495
5496
5497
5498
5499
5500
5501
5502
5503
5504
5505
5506
5507
5508
5509
5510
5511
5512
5513
5514
5515
5516
5517
5518
5519
5520
5521
5522
5523
5524
5525
5526
5527
5528
5529
5530
5531
5532
5533
5534
5535
5536
5537
5538
5539
5540
5541
5542
5543
5544
5545
5546
5547
5548
5549
5550
5551
5552
5553
5554
5555
5556
5557
5558
5559
5560
5561
5562
5563
5564
5565
5566
5567
5568
5569
5570
5571
5572
5573
5574
5575
5576
5577
5578
5579
5580
5581
5582
5583
5584
5585
5586
5587
5588
5589
5590
5591
5592
5593
5594
5595
5596
5597
5598
5599
5600
5601
5602
5603
5604
5605
5606
5607
5608
5609
5610
5611
5612
5613
5614
5615
5616
5617
5618
5619
5620
5621
5622
5623
5624
5625
5626
5627
5628
5629
5630
5631
5632
5633
5634
5635
5636
5637
5638
5639
5640
5641
5642
5643
5644
5645
5646
5647
5648
5649
5650
5651
5652
5653
5654
5655
5656
5657
5658
5659
5660
5661
5662
5663
5664
5665
5666
5667
5668
5669
5670
5671
5672
5673
5674
5675
5676
5677
5678
5679
5680
5681
5682
5683
5684
5685
5686
5687
5688
5689
5690
5691
5692
5693
5694
5695
5696
5697
5698
5699
5700
5701
5702
5703
5704
5705
5706
5707
5708
5709
5710
5711
5712
5713
5714
5715
5716
5717
5718
5719
5720
5721
5722
5723
5724
5725
5726
5727
5728
5729
5730
5731
5732
5733
5734
5735
5736
5737
5738
5739
5740
5741
5742
5743
5744
5745
5746
5747
5748
5749
5750
5751
5752
5753
5754
5755
5756
5757
5758
5759
5760
5761
5762
5763
5764
5765
5766
5767
5768
5769
5770
5771
5772
5773
5774
5775
5776
5777
5778
5779
5780
5781
5782
5783
5784
5785
5786
5787
5788
5789
5790
5791
5792
5793
5794
5795
5796
5797
5798
5799
5800
5801
5802
5803
5804
5805
5806
5807
5808
5809
5810
5811
5812
5813
5814
5815
5816
5817
5818
5819
5820
5821
5822
5823
5824
5825
5826
5827
5828
5829
5830
5831
5832
5833
5834
5835
5836
5837
5838
5839
5840
5841
5842
5843
5844
5845
5846
5847
5848
5849
5850
5851
5852
5853
5854
5855
5856
5857
5858
5859
5860
5861
5862
5863
5864
5865
5866
5867
5868
5869
5870
5871
5872
5873
5874
5875
5876
5877
5878
5879
5880
5881
5882
5883
5884
5885
5886
5887
5888
5889
5890
5891
5892
5893
5894
5895
5896
5897
5898
5899
5900
5901
5902
5903
5904
5905
5906
5907
5908
5909
5910
5911
5912
5913
5914
5915
5916
5917
5918
5919
5920
5921
5922
5923
5924
5925
5926
5927
5928
5929
5930
5931
5932
5933
5934
5935
5936
5937
5938
5939
5940
5941
5942
5943
5944
5945
5946
5947
5948
5949
5950
5951
5952
5953
5954
5955
5956
5957
5958
5959
5960
5961
5962
5963
5964
5965
5966
5967
5968
5969
5970
5971
5972
5973
5974
5975
5976
5977
5978
5979
5980
5981
5982
5983
5984
5985
5986
5987
5988
5989
5990
5991
5992
5993
5994
5995
5996
5997
5998
5999
6000
6001
6002
6003
6004
6005
6006
6007
6008
6009
6010
6011
6012
6013
6014
6015
6016
6017
6018
6019
6020
6021
6022
6023
6024
6025
6026
6027
6028
6029
6030
6031
6032
6033
6034
6035
6036
6037
6038
6039
6040
6041
6042
6043
6044
6045
6046
6047
6048
6049
6050
6051
6052
6053
6054
6055
6056
6057
6058
6059
6060
6061
6062
6063
6064
6065
6066
6067
6068
6069
6070
6071
6072
6073
6074
6075
6076
6077
6078
6079
6080
6081
6082
6083
6084
6085
6086
6087
6088
6089
6090
6091
6092
6093
6094
6095
6096
6097
6098
6099
6100
6101
6102
6103
6104
6105
6106
6107
6108
6109
6110
6111
6112
6113
6114
6115
6116
6117
6118
6119
6120
6121
6122
6123
6124
6125
6126
6127
6128
6129
6130
6131
6132
6133
6134
|
/** @file
Boot Setting File for Platform Configuration.
Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
This file is automatically generated. Please do NOT modify !!!
**/
GlobalDataDef
SKUID = 0, "DEFAULT"
EndGlobalData
StructDef
Find "ADLUPD_T"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 87 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_PcdPciExpressBaseAddress 8 bytes $_DEFAULT_ = 0xC0000000
$gPlatformFspPkgTokenSpaceGuid_PcdPciExpressRegionLength 4 bytes $_DEFAULT_ = 0x10000000
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDataBits 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugMmioBase 4 bytes $_DEFAULT_ = 0xFE036000
$gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags 1 bytes $_DEFAULT_ = 0x012
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartDataBits 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMmioBase 4 bytes $_DEFAULT_ = 0xFE034000
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_FspDebugHandler 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsPolarity 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsEnable 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiDefaultCsOutput 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsState 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiNumber 1 bytes $_DEFAULT_ = 0x0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMmioBase 4 bytes $_DEFAULT_ = 0x0
Find "ADLUPD_M"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 55 bytes
$gPlatformFspPkgTokenSpaceGuid_PlatformMemorySize 8 bytes $_DEFAULT_ = 0x550000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen 2 bytes $_DEFAULT_ = 0x200
$gPlatformFspPkgTokenSpaceGuid_EnableAbove4GBMmio 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogDevice 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr000 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr001 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr010 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr011 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr020 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr021 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr030 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr031 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr100 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr101 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr110 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr111 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr120 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr121 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr130 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr131 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_RcompResistor 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_RcompTarget 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch0 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch1 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch2 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch3 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch0 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch1 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch2 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch3 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch0 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch1 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch2 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch3 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch0 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch1 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch2 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch3 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqPinsInterleaved 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SmramMask 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Ibecc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeEnable 8 bytes $_DEFAULT_ = 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeBase 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeMask 32 bytes $_DEFAULT_ = 0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03
$gPlatformFspPkgTokenSpaceGuid_MrcFastBoot 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_RmtPerTask 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TrainTrace 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_TsegSize 4 bytes $_DEFAULT_ = 0x0400000
$gPlatformFspPkgTokenSpaceGuid_MmioSize 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ProbelessTrace 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SpdAddressTable 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciDbcMode 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_DciModphyPg 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableDynamicTccoldHandshake 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPreMemRsvd 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_X2ApicOptOut 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmaControlGuarantee 1 bytes $_DEFAULT_ = 0x1
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_VtdBaseAddress 36 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VtdDisable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VtdIgdEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdIpuEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdIopEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdItbtEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc 1 bytes $_DEFAULT_ = 0xFE
$gPlatformFspPkgTokenSpaceGuid_InternalGfx 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ApertureSize 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_UserBd 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SaGv 1 bytes $_DEFAULT_ = 0x05
$gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RMT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch3 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch3 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ScramblerSupport 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RefClk 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VddVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_Ratio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCL 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCWL 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_tFAW 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRAS 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRCDtRP 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_tREFI 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRFC 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRRD 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRTP 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NModeSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchIshEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaGvGear 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SaGvFreq 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_GearRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HeciTimeouts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Heci1BarAddress 4 bytes $_DEFAULT_ = 0xFEDA2000
$gPlatformFspPkgTokenSpaceGuid_Heci2BarAddress 4 bytes $_DEFAULT_ = 0xFEDA3000
$gPlatformFspPkgTokenSpaceGuid_Heci3BarAddress 4 bytes $_DEFAULT_ = 0xFEDA4000
$gPlatformFspPkgTokenSpaceGuid_HgDelayAfterPwrEn 2 bytes $_DEFAULT_ = 300
$gPlatformFspPkgTokenSpaceGuid_HgDelayAfterHoldReset 2 bytes $_DEFAULT_ = 100
$gPlatformFspPkgTokenSpaceGuid_MmioSizeAdjustment 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay 1 bytes $_DEFAULT_ = 0x3
$gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GrantCount 1 bytes $_DEFAULT_ = 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_GmAdr 4 bytes $_DEFAULT_ = 0xB0000000
$gPlatformFspPkgTokenSpaceGuid_GttMmAdr 4 bytes $_DEFAULT_ = 0xAF000000
$gPlatformFspPkgTokenSpaceGuid_GttSize 2 bytes $_DEFAULT_ = 0x3
$gPlatformFspPkgTokenSpaceGuid_CpuPcie0Rtd3Gpio 24 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_TxtImplemented 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SaOcSupport 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtMaxOcRatio 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageOffset 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageOverride 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtExtraTurboVoltage 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SaVoltageOffset 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_RootPortIndex 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieMultipleSegmentEnabled 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SaIpuEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed 8 bytes $_DEFAULT_ = 0x04, 0x01, 0x02, 0x04, 0x04, 0x04, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CsiSpeed 8 bytes $_DEFAULT_ = 0x2, 0x1, 0x2, 0x2, 0x2, 0x2, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_ImguClkOutEn 6 bytes $_DEFAULT_ = 0x1, 0x1, 0x1, 0x1, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableMask 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable 3 bytes $_DEFAULT_ = 0x1, 0x1, 0x1
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPcieSpeed 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_GtPsmiSupport 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortAHpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortBHpd 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortCHpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort1Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort2Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort3Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort4Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortADdc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortBDdc 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortCDdc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort1Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort2Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort3Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort4Ddc 1 bytes $_DEFAULT_ = 0x0
Skip 7 bytes
$gPlatformFspPkgTokenSpaceGuid_GmAdr64 8 bytes $_DEFAULT_ = 0xB0000000
$gPlatformFspPkgTokenSpaceGuid_PerCoreHtDisable 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SaVoltageMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaExtraTurboVoltage 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VddqVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_VppVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_CpuPcieNewFom 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiNewFom 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DynamicMemoryBoost 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_HgSupport 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryFrequency 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_OCSafeMode 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SaPreMemProductionRsvd 96 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GtClosEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3ProgramStaticEq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DmiGen3RootPortPreset 8 bytes $_DEFAULT_ = 0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointHint 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_DmiGen3RxCtlePeaking 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DmiAspm 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_DmiHweq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase23Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase3Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpre 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpo 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCm 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortRxPreset 8 bytes $_DEFAULT_ = 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortRxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCm 8 bytes $_DEFAULT_ = 0x0, 0x7, 0x6, 0x7, 0x7, 0x7, 0x7, 0x7
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCp 8 bytes $_DEFAULT_ = 0x0, 0xE, 0xA, 0x7, 0x7, 0x7, 0x7, 0x7
$gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase23Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase3Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_Gen4RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_Gen4LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpre 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpo 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiAspmCtrl 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_DmiAspmL1ExitLatency 1 bytes $_DEFAULT_ = 0x4
$gPlatformFspPkgTokenSpaceGuid_BistOnReset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SkipStopPbet 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableC6Dram 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_OcSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_OcLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CoreMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HyperThreading 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuRatioOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuRatio 1 bytes $_DEFAULT_ = 0x1C
$gPlatformFspPkgTokenSpaceGuid_BootFrequency 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_FClkFrequency 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmxEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Avx2RatioOffset 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_Avx3RatioOffset 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_BclkAdaptiveVoltage 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageAdaptive 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CorePllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingDownBin 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RingVoltageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TjMaxOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FastThrottleThreshold 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVoltageAdaptive 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TmeEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DebugInterfaceLockEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageAdaptive 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffset 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffsetPrefix 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_IaCepEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_GtCepEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DlvrBypassModeEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffset 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffsetPrefix 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreRatioOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreRatio 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomClusterRatio 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreRatioExtensionMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PvdRatioThreshold 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_UnlimitedIccMax 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CrashLogGprs 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BclkSource 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_GpioOverride 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuBclkOcFrequency 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_DisablePerCoreMask 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisablePerAtomMask 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SiSkipOverrideBootModeWhenFwUpdate 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IaIccUnlimitedMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IaIccMax 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GtIccUnlimitedMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_GtIccMax 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold0 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold0 1 bytes $_DEFAULT_ = 0x46
$gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold1 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold1 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_FllOcModeEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FllOverclockMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_CustomPowerLimit1 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Etvb 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_UnderVoltProtection 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPreMem 6 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BiosGuard 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_Txt 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PrmrrSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SinitMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtDprMemoryBase 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_TxtHeapMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtDprMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BiosAcmBase 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BiosAcmSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ApStartupBase 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TgaSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtLcpPdBase 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_TxtLcpPdSize 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_IsTPMPresence 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ReservedSecurityPreMem 32 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtleEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtle 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmphEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmph 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5Enable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0Enable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchLpcEnhancePort8xhDecoding 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPort80Route 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusArpEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchNumRsvdSmbusAddresses 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchSmbusIoBase 2 bytes $_DEFAULT_ = 0xEFA0
$gPlatformFspPkgTokenSpaceGuid_PchSmbAlertEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieClkSrcUsage 18 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
Skip 14 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieClkSrcClkReq 18 bytes $_DEFAULT_ = 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x00, 0x01
Skip 17 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieClkReqGpioMux 72 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_RsvdSmbusAddressTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PcieRpEnableMask 4 bytes $_DEFAULT_ = 0x00FFFFFF
$gPlatformFspPkgTokenSpaceGuid_PchHdaVcType 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaDspUaaCompliance 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkHdaEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHdaSdiEnable 2 bytes $_DEFAULT_ = 0x01, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicEnable 2 bytes $_DEFAULT_ = 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkAPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkBPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaDspEnable 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicDataPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSspEnable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSndwEnable 4 bytes $_DEFAULT_ = 0x01, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispCodecDisconnect 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CnviDdrRfim 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags 1 bytes $_DEFAULT_ = 0x32
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugAutoFlow 1 bytes $_DEFAULT_ = 0x0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugDataBits 1 bytes $_DEFAULT_ = 0x8
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMmioBase 4 bytes $_DEFAULT_ = 0xFE036000
$gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GtPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_McPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MrcSafeConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie0En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie1En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie2En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie3En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssXhciEn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssXdciEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TcssDma0En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssDma1En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_HobBufferSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ECT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SOT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ERDMPRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDMPRT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RCVET 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_JWRL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EWRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ERDTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRVC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDTC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMODTT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMRONT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRDSEQT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRSRT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDODTT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDEQT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDAPT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRVC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDVC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_LCT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RTL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TAT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MEMTST 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ALIASCHK 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RCVENC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RMC 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRDSUDT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EccSupport 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RemapEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RankInterleave 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnhancedInterleave 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ChHashEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ChHashOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableExtts 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnablePwrDn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnablePwrDnLpddr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SrefCfgEna 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeatLpddr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeat 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RhSelect 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ExitOnFailure 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DCC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TXTCO 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CLKTCO 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDSR 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDDSEQ 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMODTCA 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TXTCODQS 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDDRUD 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VCCDLLBP 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PVTTDNLP 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVREFDC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VDDQT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RMTBIT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EccDftEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Write0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedClock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedZq 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ChHashMask 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BClkFrequency 4 bytes $_DEFAULT_ = 100000000
$gPlatformFspPkgTokenSpaceGuid_Idd3n 2 bytes $_DEFAULT_ = 0x1A
$gPlatformFspPkgTokenSpaceGuid_Idd3p 2 bytes $_DEFAULT_ = 0x0B
$gPlatformFspPkgTokenSpaceGuid_CMDNORM 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EWRDSEQ 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_McRefresh2X 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x28
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x2C
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AllowOppRefBelowWriteThrehold 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WriteThreshold 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnCmdRate 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_Refresh2X 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EpgEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Lfsr0Mask 1 bytes $_DEFAULT_ = 0xB
$gPlatformFspPkgTokenSpaceGuid_UserThresholdEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_UserBudgetEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerDownMode 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PwdwnIdleCounter 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CmdRanksTerminated 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SafeMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CleanMemory 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpDdrDqDqsReTraining 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_UsbTcPortEnPreMem 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PostCodeOutputPort 2 bytes $_DEFAULT_ = 0x80
$gPlatformFspPkgTokenSpaceGuid_RMTLoopCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CridEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WrcFeatureEnable 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_BclkRfiFreq 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrSize 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrEnabled 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrRpLocation 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieImrRpSelection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Lfsr1Mask 1 bytes $_DEFAULT_ = 0xB
$gPlatformFspPkgTokenSpaceGuid_LpddrRttWr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpddrRttCa 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RefreshPanicWm 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_RefreshHpWm 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_Lp5CccConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CmdMirror 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DIMMDFE 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ExtendedBankHashing 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RefreshWm 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_McRefreshRate 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PeriodicDcc 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TXDQSDCC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DRAMDCA 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EARLYDIMMDFE 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SkipExtGfxScan 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_BdatEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LockPTMregs 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PegGen3Rsvd 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PanelPowerEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_BdatTestType 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DRAMEMPHASIS 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_DmaBufferSize 4 bytes $_DEFAULT_ = 0x0400000
$gPlatformFspPkgTokenSpaceGuid_PreBootDmaMask 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_OemT12DelayOverride 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DQSOFFSETADJUST 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPreMemTestRsvd 88 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_TotalFlashSize 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_BiosSize 2 bytes $_DEFAULT_ = 0x2800
$gPlatformFspPkgTokenSpaceGuid_SecurityTestRsvd 12 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusDynamicPowerGating 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WdtDisableAndLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusSpdWriteDisable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DidInitStat 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DisableCpuReplacedPolling 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DisableMessageCheck 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SkipMbpHob 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_HeciCommunication2 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_KtDeviceEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SkipCpuReplacementCheck 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuPcie1Rtd3Gpio 96 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcie2Rtd3Gpio 96 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcie3Rtd3Gpio 96 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_Avx2VoltageScaleFactor 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Avx512VoltageScaleFactor 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprEnable 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MarginLimitL2 2 bytes $_DEFAULT_ = 100
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpCdrRelock 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiCdrRelock 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSlotImplemented 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PprRunOnce 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PPR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjAddress 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjMask 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjCount 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EnableDmaBuffer 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PllMaxBandingRatio 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_DebugValue 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BoardGpioTablePreMemAddress 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_tRFCpb 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRFC2 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRFC4 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRD_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRD_S 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCCD_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR_S 1 bytes $_DEFAULT_ = 0x00
Skip 5 bytes
$gPlatformFspPkgTokenSpaceGuid_EccErrInjAddress 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EccErrInjMask 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EccErrInjCount 4 bytes $_DEFAULT_ = 0xF
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMask 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIA 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorGT 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIO 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorStall 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsDownControl 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsUpControl 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_16GB 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB_16GB 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_2R2R 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCm 8 bytes $_DEFAULT_ = 0x06, 0x05, 0x02, 0x09, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCp 8 bytes $_DEFAULT_ = 0x05, 0x03, 0x07, 0x08, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_LctCmdEyeWidth 2 bytes $_DEFAULT_ = 0x60
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmrLpddr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMaskEcc 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_Lp5BankMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRDS 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_OverloadSAM 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MrcTimeMeasure 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DfeGain 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CsPiStartHighinEct 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_UserPowerWeightsEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableFGRAndPBRWA 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LowerBasicMemTestSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableSagvReorder 1 bytes $_DEFAULT_ = 0x00
Find "ADLUPD_S"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 55 bytes
$gPlatformFspPkgTokenSpaceGuid_LogoPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LogoSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BltBufferAddress 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BltBufferSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_GraphicsConfigPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Device4Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ShowSpiController 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionBase 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionSize 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TurboMode 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SataSalpSupport 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataPortsEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SataPortDevSlpPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PortUsb20Enable 16 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PortUsb30Enable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_XdciEnable 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_DevIntConfigPtr 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NumOfDevIntConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PxRcConfig 8 bytes $_DEFAULT_ = 0x0B, 0x0A, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B
$gPlatformFspPkgTokenSpaceGuid_GpioIrqRoute 1 bytes $_DEFAULT_ = 0x0E
$gPlatformFspPkgTokenSpaceGuid_SciIrqSelect 1 bytes $_DEFAULT_ = 0x09
$gPlatformFspPkgTokenSpaceGuid_TcoIrqSelect 1 bytes $_DEFAULT_ = 0x09
$gPlatformFspPkgTokenSpaceGuid_TcoIrqEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTableEntryNum 1 bytes $_DEFAULT_ = 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTablePtr 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_PchHdaCodecSxWakeCapability 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPolarity 14 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsEnable 14 bytes $_DEFAULT_ = 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiDefaultCsOutput 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsState 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartBaudRate 28 bytes $_DEFAULT_ = 0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartParity 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDataBits 7 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartStopBits 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating 7 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDmaEnable 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartAutoFlow 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartRtsPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartCtsPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartRxPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartTxPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDbg2 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoI2cMode 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSdaPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSclPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cPadsTermination 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_IshGpGpioPinMuxing 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartRxPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartTxPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartRtsPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartCtsPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshI2cSclPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiClkPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiCsPinMuxing 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshGpGpioPadTermination 8 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartRxPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartTxPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartRtsPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartCtsPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshI2cSclPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiClkPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiCsPadTermination 4 bytes $_DEFAULT_ = 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiCsEnable 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPetxiset 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyTxiset 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPredeemp 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPehalfbit 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmphEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmph 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmpEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmp 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 80 bytes
$gPlatformFspPkgTokenSpaceGuid_PchLanEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchTsnEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressHigh 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressLow 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PciePtm 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieDpc 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEdpc 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_UsbPdoProgramming 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PmcPowerButtonDebounce 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchEspiBmeMasterSlaveEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchEspiLockLinkConfiguration 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailSupportedVoltageStates 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMax 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSupportedVoltageStates 1 bytes $_DEFAULT_ = 0x2
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMax 1 bytes $_DEFAULT_ = 0xC8
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMax 1 bytes $_DEFAULT_ = 0xC8
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxLowToHighCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x0C
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToHighCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x036
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToLowCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x2B
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxOffToHighCurModeVolTranTime 2 bytes $_DEFAULT_ = 0x0096
$gPlatformFspPkgTokenSpaceGuid_PmcDbgMsgEn 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinLen 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchFivrDynPm 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccstIccMaxControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase 4 bytes $_DEFAULT_ = 0xF8000000
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeLimit 4 bytes $_DEFAULT_ = 0xF9FFFFFF
$gPlatformFspPkgTokenSpaceGuid_PchXhciUaolEnable 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinLen 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_CnviMode 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviWifiCore 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviBtCore 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviBtAudioOffload 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CnviRfResetPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CnviClkreqPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchEspiHostC10ReportEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PmcUsb2PhySusPgEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchUsbOverCurrentEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchEspiLgmrEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailCtrlRampTmr 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailCtrlRampTmr 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlpResetConfig 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHotEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataLedEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmVrAlert 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AmtEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WatchDogEnabled 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_FwProgress 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_AmtSolEnabled 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_WatchDogTimerOs 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WatchDogTimerBios 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ForcMebxSyncUp 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotImplemented 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpAcsEnabled 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpEnableCpm 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieRpDetectTimeoutMs 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PmcModPhySusPgEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcV1p05PhyExtFetControlEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcV1p05IsExtFetControlEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PavpEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_CdClock 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PeiGraphicsPeimInit 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_D3HotEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GnaEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_IomTypeCPortPadCfg 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x06,0x11,0x00,0x04,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuUsb3OverCurrentPin 8 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
$gPlatformFspPkgTokenSpaceGuid_D3ColdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ITbtPcieTunnelingForUsb4 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SkipFspGop 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TcCstateLimit 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_VbtSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LidStatus 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IomStayInTCColdSeconds 1 bytes $_DEFAULT_ = 0x32
$gPlatformFspPkgTokenSpaceGuid_IomBeforeEnteringTCColdSeconds 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_SaPostMemRsvd 5 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VmdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VmdPort 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPortDev 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPortFunc 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_VmdVariablePtr 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBase 4 bytes $_DEFAULT_ = 0xA0000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Base 4 bytes $_DEFAULT_ = 0xA2000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Base 4 bytes $_DEFAULT_ = 0xA4000000
$gPlatformFspPkgTokenSpaceGuid_TcssCpuUsbPdoProgramming 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcPdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssAuxOri 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_TcssHslOri 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_UsbOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ITbtPcieRootPortEn 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_UsbTcPortEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ITbtForcePowerOnTimeoutInMs 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_ITbtConnectTopologyTimeoutInMs 2 bytes $_DEFAULT_ = 0x1388
$gPlatformFspPkgTokenSpaceGuid_VccSt 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ITbtDmaLtr 4 bytes $_DEFAULT_ = 0xFF,0x97,0xFF,0x97
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PtmEnabled 4 bytes $_DEFAULT_ = 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrEnable 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0xC8,0x00,0xC8,0x00,0x3C,0x00,0xC8,0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0xC8,0x00,0xC8,0x00,0xC8,0x00,0xC8,0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpForceLtrOverride 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrConfigLock 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_AesEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Psi3Enable 5 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_Psi4Enable 5 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ImonSlope 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ImonOffset 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VrConfigEnable 5 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_TdcEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_TdcTimeWindow 20 bytes $_DEFAULT_ = 0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_TdcLock 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysSlope 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AcousticNoiseMitigation 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FastPkgCRampDisable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SlowSlewRate 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_TdcCurrentLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_AcLoadline 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DcLoadline 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi1Threshold 10 bytes $_DEFAULT_ = 0x50,0x00,0x50,0x00,0x50,0x00,0x50,0x00,0x50,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi2Threshold 10 bytes $_DEFAULT_ = 0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi3Threshold 10 bytes $_DEFAULT_ = 0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00
$gPlatformFspPkgTokenSpaceGuid_IccMax 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_TxtEnable 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SkipMpInit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FivrRfiFrequency 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FivrSpreadSpectrum 1 bytes $_DEFAULT_ = 0x08
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuBistData 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CpuMpPpi 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_PreWake 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RampUp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RampDown 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VrVoltageLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VccInAuxImonIccImax 2 bytes $_DEFAULT_ = 160
$gPlatformFspPkgTokenSpaceGuid_EnableVsysCritical 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VsysFullScale 1 bytes $_DEFAULT_ = 0x18
$gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchMantissa 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchExponent 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchMantissa 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchExponent 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_VccInAuxImonSlope 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_VccInAuxImonOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FivrSpectrumEnable 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_IccLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PpinSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableMinVoltageOverride 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MinVoltageRuntime 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceMemSize 1 bytes $_DEFAULT_ = 0xff
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_MinVoltageC8 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbiosType4MaxSpeedOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Irms 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_AvxDisable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Avx3Disable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_X2ApicSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VrPowerDeliveryDesign 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableFastVmode 5 bytes $_DEFAULT_ = 0x0, 0x0, 0x0, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_VsysFullScale1 4 bytes $_DEFAULT_ = 0x5DC0
$gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold1 4 bytes $_DEFAULT_ = 0x1770
$gPlatformFspPkgTokenSpaceGuid_PsysFullScale 4 bytes $_DEFAULT_ = 0x30D40
$gPlatformFspPkgTokenSpaceGuid_PsysCriticalThreshold 4 bytes $_DEFAULT_ = 0x1FBD0
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemProduction 11 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPwrOptEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchWriteProtectionEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchReadProtectionEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeBase 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaPme 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiCs0Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIoApicEntry24_119 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchIoApicId 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshUartEnable 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshI2cEnable 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshGpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshPdtUnlock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchLanLtrEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchCrid 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RtcBiosInterfaceLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RtcMemoryLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpHotPlug 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpPmSci 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpTransmitterHalfSwing 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpClkReqDetect 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpAdvancedErrorReporting 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpUnsupportedRequestReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpFatalErrorReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpNoFatalErrorReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpCorrectableErrorReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnFatalError 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnNonFatalError 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnCorrectableError 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpMaxPayload 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort0InterruptPinMuxing 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort0WakeOnTouch 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort1HidResetSequencingDelay 2 bytes $_DEFAULT_ = 0x12C
$gPlatformFspPkgTokenSpaceGuid_ThcPort1InterruptPinMuxing 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort1WakeOnTouch 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieRpPcieSpeed 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpPhysicalSlotNumber 28 bytes $_DEFAULT_ = 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B
$gPlatformFspPkgTokenSpaceGuid_PcieRpCompletionTimeout 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpAspm 28 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieRpL1Substates 28 bytes $_DEFAULT_ = 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03
$gPlatformFspPkgTokenSpaceGuid_PcieRpL1Low 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrConfigLock 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqOverrideDefault 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqMethod 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqLocalTransmitterOverrideEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3NumberOfPresetsOrCoefficients 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PreCursorList 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PostCursorList 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PresetList 11 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ThcPort0HidResetSequencingDelay 2 bytes $_DEFAULT_ = 0x12C
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh1DownstreamPortTransmitterPreset 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh1UpstreamPortTransmitterPreset 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh2LocalTransmitterOverridePreset 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieEnablePeerMemoryWrite 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieComplianceTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpFunctionSwap 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3ProgramStaticEq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4ProgramStaticEq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PchPmPmeB0S5Dis 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpImrEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpImrSelection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWolEnableOverride 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPcieWakeFromDeepSx 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanDeepSxEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmLanWakeFromDeepSx 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmDeepSxPol 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpS3MinAssert 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpS4MinAssert 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpSusMinAssert 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpAMinAssert 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchEnableDbcObs 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpStrchSusUp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpLanLowDc 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPwrBtnOverridePeriod 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableDsxAcPresentPulldown 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableNativePowerButton 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmMeWakeSts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmWolOvrWkSts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPwrCycDur 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmPciePllSsc 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchLegacyIoLowLatency 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPwrOptEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EsataSpeedLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataSpeedLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsHotPlug 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsInterlockSw 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsExternal 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsSpinUp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsSolidStateDrive 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsEnableDitoConfig 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDmVal 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDitoVal 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsZpOdd 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstRaidDeviceId 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieEnable 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieStoragePort 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieDeviceResetDelay 3 bytes $_DEFAULT_ = 100, 100, 100
$gPlatformFspPkgTokenSpaceGuid_UfsEnable 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IehMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchT0Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchT1Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchT2Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchTTEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTTState13Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTTLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TTSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TTCrossThrottling 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchDmiTsawEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiTS0TW 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_DmiTS1TW 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DmiTS2TW 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiTS3TW 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0T1M 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataP0T2M 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SataP0T3M 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SataP0TDisp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1T1M 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataP1T2M 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SataP1T3M 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SataP1TDisp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0Tinact 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0TDispFinit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1Tinact 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1TDispFinit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataThermalSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchMemoryThrottlingEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchMemoryPmsyncEnable 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchMemoryC0TransmitEnable 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchMemoryPinSelection 2 bytes $_DEFAULT_ = 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchTemperatureHotLevel 2 bytes $_DEFAULT_ = 0x0073
$gPlatformFspPkgTokenSpaceGuid_Usb2OverCurrentPin 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x06, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_Usb3OverCurrentPin 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrOverrideEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ThcMode 2 bytes $_DEFAULT_ = 0x0, 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrHighIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrMediumIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrLowIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGating 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGatingOnS3 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableTcoTimer 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HybridStorageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuRootportUsedForHybridStorage 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchRootportUsedForCpuAttach 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchAcpiL6dPmeHandling 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_BgpdtHash 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_BiosGuardAttr 4 bytes $_DEFAULT_ = 0xFFFFFFFF
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_BiosGuardModulePtr 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_SendEcCmd 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_EcCmdProvisionEav 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_EcCmdLock 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_SiSkipSsidProgramming 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SiCustomizedSvid 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SiCustomizedSsid 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SiSsidTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SiNumberOfSsidTableEntry 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PortResetMessageEnable 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnforceEDebugMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsOnEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcCpuC10GatePinEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchDmiCwbEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcOsIdleEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchS0ixAutoDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmLatchEventsC10Exit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrTimerEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrTimer1Val 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrMultiplier1Val 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrHostPartitionReset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcOverride 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcSel 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCm 32 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCp 32 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3RootPortPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4RootPortPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointHint 20 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointHint 20 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieFiaProgramming 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieClockGating 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPciePowerGating 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieComplianceTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieEnablePeerMemoryWrite 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpFunctionSwap 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieSlotSelection 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuPcieDeviceOverrideTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpHotPlug 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPmSci 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpTransmitterHalfSwing 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAcsEnabled 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableCpm 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAdvancedErrorReporting 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpUnsupportedRequestReport 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpFatalErrorReport 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNoFatalErrorReport 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpCorrectableErrorReport 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnFatalError 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnNonFatalError 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnCorrectableError 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMaxPayload 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcEnabled 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcExtensionsEnabled 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSlotImplemented 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3EqPh3Method 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4EqPh3Method 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPhysicalSlotNumber 4 bytes $_DEFAULT_ = 0x00, 0x01, 0x02, 0x03
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAspm 4 bytes $_DEFAULT_ = 0x03, 0x03, 0x03, 0x03
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpL1Substates 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrEnable 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrConfigLock 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPtmEnabled 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDetectTimeoutMs 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMultiVcEnabled 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_SkipPamLock 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EdramTestMode 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_RenderStandby 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PmSupport 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_CdynmaxClampEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtFreqMax 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_DisableTurboGt 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SkipCdClockInit 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RC1pFreqEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchTsnMultiVcEnable 1 bytes $_DEFAULT_ = 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_LogoPixelHeight 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LogoPixelWidth 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Usb4CmMode 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieResizableBarSupport 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SaPostMemTestRsvd 3 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableRsr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem1 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Hwp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_HdcControl 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PowerLimit1Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit2 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TurboPowerLimitLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3DutyCycle 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3Lock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit4Lock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TccActivationOffset 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_TccOffsetClamp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TccOffsetLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NumberOfEntries 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom1TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom1ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom2ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom3ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpBios 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MlcStreamerPrefetcher 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MlcSpatialPrefetcher 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MonitorMwaitEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MachineCheckEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ApIdleManner 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Eist 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnergyEfficientPState 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnergyEfficientTurbo 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TStates 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_BiProcHot 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DisableProcHotOut 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ProcHotResponse 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DisableVrThermalAlert 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableAllThermalFunctions 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ThermalMonitor 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Cx 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmgCstCfgCtrlLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1e 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PkgCStateDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PkgCStateUnDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CStatePreWake 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TimedMwait 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CstCfgCtrIoMwaitRedirection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PkgCStateLimit 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl0TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PpmIrmSetting 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcHotLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MaxRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_StateRatio 40 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_StateRatioMax16 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PsysPmax 2 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5Irtl 2 bytes $_DEFAULT_ = 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit2Power 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit4 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TccOffsetTimeWindowForRatl 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Power 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2Power 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RaceToHalt 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HwpInterruptControl 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem2 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableItbm 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1StateAutoDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1StateUnDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MinRingRatioLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MaxRingRatioLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnablePerCorePState 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoPerCorePstate 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoEppGrouping 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableEpbPeciOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableFastMsrHwpReq 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ApplyConfigTdp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_HwpLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DualTauBoost 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_StepDownMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PlatformAtxTelemetryUnit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcHotDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TurboConfiguration 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableHwpScalabilityTracking 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemTest 11 bytes $_DEFAULT_ = 0x00
Skip 16 bytes
$gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_DisableD0I3SettingForHeci 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MctpBroadcastCycle 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchLockDownGlobalSmi 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosInterface 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchUnlockGpioPads 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSbAccessUnlock 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxSnoopLatency 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxNoSnoopLatency 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMode 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMultiplier 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideValue 56 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMode 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMultiplier 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideValue 56 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitScale 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitValue 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEnablePort8xhDecode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPciePort8xhDecodePortIndex 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableEnergyReport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchXhciOcLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcLpmS0ixSubStateEnableMask 1 bytes $_DEFAULT_ = 0x9
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxSnoopLatency 8 bytes $_DEFAULT_ = 0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxNoSnoopLatency 8 bytes $_DEFAULT_ = 0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Uptp 4 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Dptp 4 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Uptp 4 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Dptp 4 bytes $_DEFAULT_ = 0x09, 0x09, 0x09, 0x09
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Uptp 4 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Dptp 4 bytes $_DEFAULT_ = 0x05, 0x05, 0x05, 0x05
$gPlatformFspPkgTokenSpaceGuid_EnableTcssCovTypeA 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_MappingPchXhciUsbA 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcC10DynamicThresholdAdjustment 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitRatio 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitNumCore 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitRatio 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitNumCore 8 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_FspEventHandler 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VmdGlobalMapping 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieFunc0LinkDisable 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcSkipVccInConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CseDataResilience 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_HorizontalResolution 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_VerticalResolution 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ThcActiveLtr 8 bytes $_DEFAULT_ = 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
$gPlatformFspPkgTokenSpaceGuid_ThcIdleLtr 8 bytes $_DEFAULT_ = 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
$gPlatformFspPkgTokenSpaceGuid_ThcHidResetPad 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidResetPadTrigger 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidConnectionSpeed 8 bytes $_DEFAULT_ = 0x40,0x66,0x03,0x01,0x40,0x66,0x03,0x01
$gPlatformFspPkgTokenSpaceGuid_ThcLimitPacketSize 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcPerformanceLimitation 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportHeaderAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportBodyAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidOutputReportAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidReadOpcode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidWriteOpcode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidFlags 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_MemoryBuffer 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MemorySize 4 bytes $_DEFAULT_ = 0x00
EndStruct
List &EN_DIS
Selection 0x1 , "Enabled"
Selection 0x0 , "Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable
Selection 0 , "Disable"
Selection 1 , "Enable and Initialize"
Selection 2 , "Enable without Initializing"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow
Selection 0 , " Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel
Selection 0 , "Disable"
Selection 1 , "Error Only"
Selection 2 , "Error and Warnings"
Selection 3 , "Load Error Warnings and Info"
Selection 4 , "Load Error Warnings and Info & Event"
Selection 5 , "Load Error Warnings Info and Verbose"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase
Selection 0 , "0x3F8"
Selection 1 , "0x2F8"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable
Selection 0 , "Disable"
Selection 1 , "Enable and Initialize"
Selection 2 , "Enable without Initializing"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow
Selection 0 , " Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen
Selection 0x100 , "256 Bytes"
Selection 0x200 , "512 Bytes"
Selection 0x400 , "1024 Bytes"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SmramMask
Selection 0 , " Neither"
Selection 1 , "AB-SEG"
Selection 2 , "H-SEG"
Selection 3 , " Both"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode
Selection 0 , "Protect base on address range"
Selection 1 , "Non-protected"
Selection 2 , "All protected"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TsegSize
Selection 0x0400000 , "4MB"
Selection 0x01000000 , "16MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent
Selection 0 , "Disabled"
Selection 2 , "Enabled (All Probes+TraceHub)"
Selection 6 , "Enable (Low Power)"
Selection 7 , "Manual"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DciDbcMode
Selection 0 , "Disabled"
Selection 1 , "USB2 DbC"
Selection 2 , "USB3 DbC"
Selection 3 , "Both"
Selection 4 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode
Selection 0 , " Disable"
Selection 1 , " Target Debugger Mode"
Selection 2 , " Host Debugger Mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect
Selection 0 , " Both"
Selection 1 , " ClkA"
Selection 2 , " ClkB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc
Selection 0x00 , "0MB"
Selection 0x01 , "32MB"
Selection 0x02 , "64MB"
Selection 0x03 , "96MB"
Selection 0x04 , "128MB"
Selection 0x05 , "160MB"
Selection 0xF0 , "4MB"
Selection 0xF1 , "8MB"
Selection 0xF2 , "12MB"
Selection 0xF3 , "16MB"
Selection 0xF4 , "20MB"
Selection 0xF5 , "24MB"
Selection 0xF6 , "28MB"
Selection 0xF7 , "32MB"
Selection 0xF8 , "36MB"
Selection 0xF9 , "40MB"
Selection 0xFA , "44MB"
Selection 0xFB , "48MB"
Selection 0xFC , "52MB"
Selection 0xFD , "56MB"
Selection 0xFE , "60MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ApertureSize
Selection 0 , "128 MB"
Selection 1 , "256 MB"
Selection 3 , "512 MB"
Selection 7 , "1024 MB"
Selection 15 , " 2048 MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_UserBd
Selection 0 , "Mobile"
Selection 1 , "Desktop1Dpc"
Selection 2 , "Desktop2DpcDaisyChain"
Selection 3 , "Desktop2DpcTeeTopologyAsymmetrical"
Selection 4 , "Desktop2DpcTeeTopology"
Selection 5 , "UltMobile"
Selection 7 , "UP Server"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss
Selection 0 , "Disabled"
Selection 1 , "Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit
Selection 1067 , "1067"
Selection 1333 , "1333"
Selection 1600 , "1600"
Selection 1867 , "1867"
Selection 2133 , "2133"
Selection 2400 , "2400"
Selection 2667 , "2667"
Selection 2933 , "2933"
Selection 0 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SaGv
Selection 0 , "Disabled"
Selection 1 , "FixedPoint0"
Selection 2 , "FixedPoint1"
Selection 3 , "FixedPoint2"
Selection 4 , "FixedPoint3"
Selection 5 , "Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl
Selection 0 , "Auto"
Selection 1 , "Manual"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected
Selection 0 , "Default SPD Profile"
Selection 1 , "Custom Profile"
Selection 2 , "XMP Profile 1"
Selection 3 , "XMP Profile 2"
Selection 4 , "XMP Profile 3"
Selection 5 , "XMP User Profile 4"
Selection 6 , "XMP User Profile 5"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RefClk
Selection 0 , "133MHz"
Selection 1 , "100MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Ratio
Selection 0 , "Auto"
Selection 4 , "4"
Selection 5 , "5"
Selection 6 , "6"
Selection 7 , "7"
Selection 8 , "8"
Selection 9 , "9"
Selection 10 , "10"
Selection 11 , "11"
Selection 12 , "12"
Selection 13 , "13"
Selection 14 , "14"
Selection 15 , "15"
EndList
List &gPlatformFspPkgTokenSpaceGuid_tWR
Selection 0 , "Auto"
Selection 5 , "5"
Selection 6 , "6"
Selection 7 , "7"
Selection 8 , "8"
Selection 10 , "10"
Selection 12 , "12"
Selection 14 , "14"
Selection 16 , "16"
Selection 18 , "18"
Selection 20 , "20"
Selection 24 , "24"
Selection 30 , "30"
Selection 34 , "34"
Selection 40 , "40"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode
Selection 0 , " Disable"
Selection 1 , "Target Debugger Mode"
Selection 2 , "Host Debugger Mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom
Selection 0 , "Before"
Selection 1 , "After"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay
Selection 0 , "iGFX"
Selection 1 , "PEG"
Selection 2 , "PCIe Graphics on PCH"
Selection 3 , "AUTO"
Selection 4 , "Hybrid Graphics"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize
Selection 0 , "32MB"
Selection 1 , "288MB"
Selection 2 , "544MB"
Selection 3 , "800MB"
Selection 4 , "1024MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GttSize
Selection 1 , "2MB"
Selection 2 , "4MB"
Selection 3 , "8MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GtVoltageMode
Selection 0 , " Adaptive"
Selection 1 , " Override"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed
Selection 1 , "x1"
Selection 2 , "x2"
Selection 3 , "x3"
Selection 4 , "x4"
Selection 8 , "x8"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CsiSpeed
Selection 0 , "Sensor default"
Selection 1 , "<416Mbps"
Selection 2 , "<1.5Gbps"
Selection 3 , "<2Gbps"
Selection 4 , "<2.5Gbps"
Selection 5 , "<4Gbps"
Selection 6 , ">4Gbps"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig
Selection 0 , "Disabled"
Selection 1 , "eDP"
Selection 2 , "MIPI DSI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig
Selection 0 , "Disabled"
Selection 1 , "eDP"
Selection 2 , "MIPI DSI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed
Selection 0 , "Auto"
Selection 1 , "Gen1"
Selection 2 , "Gen2"
Selection 3 , "Gen3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable
Selection 0 , "Disable phase2"
Selection 1 , "Enable phase2"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method
Selection 0 , "Auto"
Selection 1 , "HwEq"
Selection 2 , "SwEq"
Selection 3 , "StaticEq"
Selection 4 , "BypassPhase3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis
Selection 0 , " -6dB"
Selection 1 , " -3.5dB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BootFrequency
Selection 0 , "0"
Selection 1 , "1"
Selection 2 , "2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount
Selection 0 , "Disable all big cores"
Selection 1 , "1"
Selection 2 , "2"
Selection 3 , "3"
Selection 0xFF , "Active all big cores"
EndList
List &gPlatformFspPkgTokenSpaceGuid_FClkFrequency
Selection 0 , "800 MHz"
Selection 1 , " 1 GHz"
Selection 2 , " 400 MHz"
Selection 3 , " Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable
Selection 0 , " False"
Selection 1 , " True"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount
Selection 0 , "Disable all small cores"
Selection 1 , "1"
Selection 2 , "2"
Selection 3 , "3"
Selection 0xFF , "Active all small cores"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix
Selection 0 , "Positive"
Selection 1 , "Negative"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope
Selection 0 , "All-core"
Selection 1 , "Per-core"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CrashLogGprs
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "Only Smm GPRs Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BclkSource
Selection 1 , "CPU BCLK"
Selection 2 , "PCH BCLK"
Selection 3 , "External CLK"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride
Selection 0 , " 3200MHz"
Selection 1 , " 1600MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup
Selection 0 , "Enable"
Selection 1 , "Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchPort80Route
Selection 0 , "LPC"
Selection 1 , "PCI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaVcType
Selection 0 , " VC0"
Selection 1 , " VC1"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating
Selection 0 , " POR"
Selection 1 , " Force Enable"
Selection 2 , " Force Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency
Selection 4 , " 96MHz"
Selection 3 , " 48MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode
Selection 0 , " 2T"
Selection 2 , " 4T"
Selection 3 , " 8T"
Selection 4 , " 16T"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate
Selection 3 , "9600"
Selection 4 , "19200"
Selection 6 , "56700"
Selection 7 , "115200"
EndList
List &gPlatformFspPkgTokenSpaceGuid_HobBufferSize
Selection 0 , "Default"
Selection 1 , " 1 Byte"
Selection 2 , " 1 KB"
Selection 3 , " Max value"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RhSelect
Selection 0 , "Disable"
Selection 1 , "RFM"
Selection 2 , "pTRR"
EndList
List &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit
Selection 0 , "BIT6"
Selection 1 , "BIT7"
Selection 2 , "BIT8"
Selection 3 , "BIT9"
Selection 4 , "BIT10"
Selection 5 , "BIT11"
Selection 6 , "BIT12"
Selection 7 , "BIT13"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BClkFrequency
Selection 100000000 , "100Hz"
Selection 125000000 , "125Hz"
Selection 167000000 , "167Hz"
Selection 250000000 , "250Hz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EnCmdRate
Selection 0 , "Disable"
Selection 5 , "2 CMDS"
Selection 7 , "3 CMDS"
Selection 9 , "4 CMDS"
Selection 11 , "5 CMDS"
Selection 13 , "6 CMDS"
Selection 15 , "7 CMDS"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Refresh2X
Selection 0 , "Disable"
Selection 1 , "Enabled for WARM or HOT"
Selection 2 , "Enabled HOT only"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PowerDownMode
Selection 0x0 , "No Power Down"
Selection 0x1 , "APD"
Selection 0x6 , "PPD DLL OFF"
Selection 0xFF , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout
Selection 0 , "Enabled"
Selection 1 , "Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel
Selection 0 , "Disable"
Selection 1 , "Error Only"
Selection 2 , "Error and Warnings"
Selection 3 , "Load Error Warnings and Info"
Selection 4 , "Load Error Warnings and Info & Event"
Selection 5 , "Load Error Warnings Info and Verbose"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc
Selection 0 , " Disabled"
Selection 1 , " Enabled on DIMM0 only"
Selection 2 , " Enabled on DIMM1 only"
Selection 3 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RefreshWm
Selection 0 , "Set Refresh Watermarks to Low"
Selection 1 , "Set Refresh Watermarks to High (Default)"
EndList
List &gPlatformFspPkgTokenSpaceGuid_McRefreshRate
Selection 0 , "NORMAL Refresh"
Selection 1 , "1x Refresh"
Selection 2 , "2x Refresh"
Selection 3 , "4x Refresh"
EndList
List &gPlatformFspPkgTokenSpaceGuid_LpMode
Selection 0 , " Auto (default)"
Selection 1 , " Enabled"
Selection 2 , " Disabled"
Selection 3 , " Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BdatTestType
Selection 0 , "RMT per Rank"
Selection 1 , "RMT per Bit"
Selection 2 , "Margin2D"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay
Selection 0 , " No Delay"
Selection 0xFFFF , " Auto Calulate T12 Delay"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board
Selection 0 , " no"
Selection 1 , " yes"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PprEnable
Selection 0 , "Disable"
Selection 1 , "Soft PPR"
Selection 2 , "Hard PPR"
Selection 3 , "No Repair"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck
Selection 0 , "Disable"
Selection 1 , "L1"
Selection 2 , "L2"
Selection 3 , "Both"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl
Selection 0 , " No Error Injection"
Selection 1 , "Inject Correctable Error Address match"
Selection 3 , "Inject Correctable Error on insertion counter"
Selection 5 , " Inject Uncorrectable Error Address match"
Selection 7 , "Inject Uncorrectable Error on insertion counter"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PprRunOnce
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Lp5BankMode
Selection 0 , "Auto"
Selection 1 , "8 Bank Mode"
Selection 2 , "16 Bank Mode"
Selection 3 , "BG Mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DfeGain
Selection 0 , "0"
Selection 1 , "1"
Selection 2 , "2"
Selection 3 , "3"
Selection 9 , "-1"
Selection 10 , "-2"
Selection 11 , "-3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SataMode
Selection 0 , "AHCI"
Selection 1 , "RAID"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber
Selection 0 , "UART0"
Selection 1 , "UART1"
Selection 2 , "UART2"
Selection 3 , "UART3"
Selection 4 , "UART4"
Selection 5 , "UART5"
Selection 6 , "UART6"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed
Selection 0 , " 24Mhz 2.5Gbps"
Selection 1 , " 24Mhz 1Gbps"
Selection 2 , " 38.4Mhz 2.5Gbps"
Selection 3 , " 38.4Mhz 1Gbps"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CnviMode
Selection 0 , "Disable"
Selection 1 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CdClock
Selection 0xFF , " Auto (Max based on reference clock frequency)"
Selection 0 , " 192"
Selection 1 , " 307.2"
Selection 2 , " 312 Mhz"
Selection 3 , " 324Mhz"
Selection 4 , " 326.4 Mhz"
Selection 5 , " 552 Mhz"
Selection 6 , " 556.8 Mhz"
Selection 7 , " 648 Mhz"
Selection 8 , " 652.8 Mhz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_LidStatus
Selection 0 , " LidClosed"
Selection 1 , " LidOpen"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr
Selection 0 , " VMD_32BIT_NONPREFETCH"
Selection 1 , " VMD_64BIT_NONPREFETCH"
Selection 2 , " VMD_64BIT_PREFETCH"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr
Selection 0 , " VMD_32BIT_NONPREFETCH"
Selection 1 , " VMD_64BIT_NONPREFETCH"
Selection 2 , " VMD_64BIT_PREFETCH"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr
Selection 0 , " VMD_32BIT_NONPREFETCH"
Selection 1 , " VMD_64BIT_NONPREFETCH"
Selection 2 , " VMD_64BIT_PREFETCH"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SlowSlewRate
Selection 0 , " Fast/2"
Selection 1 , " Fast/4"
Selection 2 , " Fast/8"
Selection 3 , " Fast/16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PpinSupport
Selection 0 , " Disable"
Selection 1 , " Enable"
Selection 2 , " Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_AvxDisable
Selection 0 , " Enable"
Selection 1 , " Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Avx3Disable
Selection 0 , " Enable"
Selection 1 , " Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EnableFastVmode
Selection 0 , " Disable"
Selection 1 , " Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency
Selection 0 , " 6MHz"
Selection 1 , " 12MHz"
Selection 2 , " 24MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment
Selection 0x0 , "ThcAssignmentNone"
Selection 0x1 , "ThcAssignmentThc0"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment
Selection 0x0 , "ThcAssignmentNone"
Selection 0x1 , "ThcPort1AssignmentThc0"
Selection 0x2 , "ThcAssignmentThc1"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieEqMethod
Selection 0 , " HardwareEq"
Selection 1 , " FixedEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieEqMode
Selection 0 , " PresetEq"
Selection 1 , " CoefficientEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IehMode
Selection 0 , " Bypass"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS0TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS1TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS2TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS3TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_HybridStorageMode
Selection 0 , " Disabled"
Selection 1 , " Dynamic Configuration"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt
Selection 0 , "Msix"
Selection 1 , "Msi"
Selection 2 , "Legacy"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear
Selection 0 , " Disable ME Unconfig On Rtc Clear"
Selection 1 , " Enable ME Unconfig On Rtc Clear"
Selection 2 , " Cmos is clear"
Selection 3 , " Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl
Selection 0 , "Disabled"
Selection 1 , "L0s"
Selection 2 , "L1"
Selection 3 , "L0sL1"
Selection 4 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EdramTestMode
Selection 0 , " EDRAM SW disable"
Selection 1 , " EDRAM SW Enable"
Selection 2 , " EDRAM HW mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GtFreqMax
Selection 0xFF , " Auto(Default)"
Selection 2 , " 100 Mhz"
Selection 3 , " 150 Mhz"
Selection 4 , " 200 Mhz"
Selection 5 , " 250 Mhz"
Selection 6 , " 300 Mhz"
Selection 7 , " 350 Mhz"
Selection 8 , " 400 Mhz"
Selection 9 , " 450 Mhz"
Selection 0xA , " 500 Mhz"
Selection 0xB , " 550 Mhz"
Selection 0xC , " 600 Mhz"
Selection 0xD , " 650 Mhz"
Selection 0xE , " 700 Mhz"
Selection 0xF , " 750 Mhz"
Selection 0x10 , " 800 Mhz"
Selection 0x11 , " 850 Mhz"
Selection 0x12 , "900 Mhz"
Selection 0x13 , " 950 Mhz"
Selection 0x14 , " 1000 Mhz"
Selection 0x15 , " 1050 Mhz"
Selection 0x16 , " 1100 Mhz"
Selection 0x17 , " 1150 Mhz"
Selection 0x18 , " 1200 Mhz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ApIdleManner
Selection 1 , " HALT loop"
Selection 2 , " MWAIT loop"
Selection 3 , " RUN loop"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme
Selection 0 , " Single Range Output"
Selection 1 , " ToPA Output"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable
Selection 0 , " False"
Selection 1 , " True"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TurboConfiguration
Selection 0 , " Max Transient Turbo"
Selection 1 , " 1.2 X TDP"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage
Selection 0 , "Disable"
Selection 1 , "Send in PEI"
Selection 2 , "Send in DXE"
Selection 3 , "Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp
Selection 0 , " Auto"
Selection 1 , " Gen3 Foms"
Selection 2 , " Gen4 Foms"
Selection 3 , " Gen3 and Gen4 Foms"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode
Selection 0 , " Disable"
Selection 1 , " Enable"
EndList
BeginInfoBlock
PPVer "0.1"
Description "Alder Lake Platform"
EndInfoBlock
Page "FSP-T Settings"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable, "PcdSerialIoUartDebugEnable", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable,
Help "Enable SerialIo Uart debug library with/without initializing SerialIo Uart device in FSP. "
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber, "PcdSerialIoUartNumber", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber,
Help "Select SerialIo Uart Controller for debug. Note: If UART0 is selected as CNVi BT Core interface, it cannot be used for debug purpose."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode, "PcdSerialIoUartMode - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode,
Help "Select SerialIo Uart Controller mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartBaudRate, "PcdSerialIoUartBaudRate - FSPT", DEC,
Help "Set default BaudRate Supported from 0 - default to 6000000"
"Valid range: 0 ~ 6000000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdPciExpressBaseAddress, "Pci Express Base Address", HEX,
Help "Base address to be programmed for Pci Express "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdPciExpressRegionLength, "Pci Express Region Length", HEX,
Help "Region Length to be programmed for Pci Express "
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity, "PcdSerialIoUartParity - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity,
Help "Set default Parity."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDataBits, "PcdSerialIoUartDataBits - FSPT", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0x08"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits, "PcdSerialIoUartStopBits - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits,
Help "Set default stop bits."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow, "PcdSerialIoUartAutoFlow - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow,
Help "Enables UART hardware flow control, CTS and RTS lines."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRxPinMux, "PcdSerialIoUartRxPinMux - FSPT", HEX,
Help "Select RX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartTxPinMux, "PcdSerialIoUartTxPinMux - FSPT", HEX,
Help "Select TX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRtsPinMux, "PcdSerialIoUartRtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart used for debug Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartCtsPinMux, "PcdSerialIoUartCtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart used for debug Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugMmioBase, "PcdSerialIoUartDebugMmioBase - FSPT", HEX,
Help "Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIoUartMode = SerialIoUartPci."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable, "PcdLpcUartDebugEnable", &gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable,
Help "Enable to initialize LPC Uart device in FSP."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags, "Debug Interfaces", HEX,
Help "Debug Interfaces. BIT0-RAM, BIT1-UART, BIT3-USB3, BIT4-Serial IO, BIT5-TraceHub, BIT2 - Not used."
"Valid range: 0x00 ~ 0x3F"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel, "PcdSerialDebugLevel", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel,
Help "Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase, "ISA Serial Base selection", &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase,
Help "Select ISA Serial Base address. Default is 0x3F8."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable, "PcdSerialIo2ndUartEnable", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable,
Help "Enable Additional SerialIo Uart device in FSP."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber, "PcdSerialIo2ndUartNumber", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber,
Help "Select SerialIo Uart Controller Number"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode, "PcdSerialIo2ndUartMode - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode,
Help "Select SerialIo Uart Controller mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartBaudRate, "PcdSerialIo2ndUartBaudRate - FSPT", DEC,
Help "Set default BaudRate Supported from 0 - default to 6000000"
"Valid range: 0 ~ 6000000"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity, "PcdSerialIo2ndUartParity - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity,
Help "Set default Parity."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartDataBits, "PcdSerialIo2ndUartDataBits - FSPT", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0x08"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits, "PcdSerialIo2ndUartStopBits - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits,
Help "Set default stop bits."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow, "PcdSerialIo2ndUartAutoFlow - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow,
Help "Enables UART hardware flow control, CTS and RTS lines."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRxPinMux, "PcdSerialIo2ndUartRxPinMux - FSPT", HEX,
Help "Select RX pin muxing for SerialIo UART"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartTxPinMux, "PcdSerialIo2ndUartTxPinMux - FSPT", HEX,
Help "Select TX pin muxing for SerialIo UART"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRtsPinMux, "PcdSerialIo2ndUartRtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartCtsPinMux, "PcdSerialIo2ndUartCtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMmioBase, "PcdSerialIo2ndUartMmioBase - FSPT", HEX,
Help "Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIo2ndUartMode = SerialIoUartPci."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FspDebugHandler, "FspDebugHandler", HEX,
Help "<b>Optional</b> pointer to the boot loader's implementation of FSP_DEBUG_HANDLER."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsPolarity, "Serial Io SPI Chip Select Polarity", HEX,
Help "Sets polarity for each chip Select. Available options: 0:SerialIoSpiCsActiveLow, 1:SerialIoSpiCsActiveHigh"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsEnable, "Serial Io SPI Chip Select Enable", HEX,
Help "0:Disabled, 1:Enabled. Enables GPIO for CS0 or CS1 if it is Enabled"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiDefaultCsOutput, "Serial Io SPI Default Chip Select Output", HEX,
Help "Sets Default CS as Output. Available options: 0:CS0, 1:CS1"
"Valid range: 0x00 ~ 0x1"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsMode, "Serial Io SPI Default Chip Select Mode HW/SW", HEX,
Help "Sets Default CS Mode Hardware or Software. Available options: 0:HW, 1:SW"
"Valid range: 0x00 ~ 0x1"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsState, "Serial Io SPI Default Chip Select State Low/High", HEX,
Help "Sets Default CS State Low or High. Available options: 0:Low, 1:High"
"Valid range: 0x00 ~ 0x1"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMmioBase, "Serial Io SPI Device MMIO Base", HEX,
Help "Assigns MMIO for Serial Io SPI controller usage in early stage."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EndPage
Page "Memory Reference Code"
EditNum $gPlatformFspPkgTokenSpaceGuid_PlatformMemorySize, "Platform Reserved Memory Size", HEX,
Help "The minimum platform memory size required to pass control into DXE"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen, "SPD Data Length", &gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen,
Help "Length of SPD Data"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableAbove4GBMmio, "Enable above 4GB MMIO resource support", &EN_DIS,
Help "Enable/disable above 4GB MMIO resource support"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr000, "Memory SPD Pointer Controller 0 Channel 0 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr001, "Memory SPD Pointer Controller 0 Channel 0 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr010, "Memory SPD Pointer Controller 0 Channel 1 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr011, "Memory SPD Pointer Controller 0 Channel 1 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr020, "Memory SPD Pointer Controller 0 Channel 2 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr021, "Memory SPD Pointer Controller 0 Channel 2 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr030, "Memory SPD Pointer Controller 0 Channel 3 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr031, "Memory SPD Pointer Controller 0 Channel 3 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr100, "Memory SPD Pointer Controller 1 Channel 0 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr101, "Memory SPD Pointer Controller 1 Channel 0 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr110, "Memory SPD Pointer Controller 1 Channel 1 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr111, "Memory SPD Pointer Controller 1 Channel 1 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr120, "Memory SPD Pointer Controller 1 Channel 2 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr121, "Memory SPD Pointer Controller 1 Channel 2 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr130, "Memory SPD Pointer Controller 1 Channel 3 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr131, "Memory SPD Pointer Controller 1 Channel 3 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RcompResistor, "RcompResistor settings", HEX,
Help "Indicates RcompResistor settings: Board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RcompTarget, "RcompTarget settings", HEX,
Help "RcompTarget settings: board-dependent"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch0, "Dqs Map CPU to DRAM MC 0 CH 0", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch1, "Dqs Map CPU to DRAM MC 0 CH 1", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch2, "Dqs Map CPU to DRAM MC 0 CH 2", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch3, "Dqs Map CPU to DRAM MC 0 CH 3", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch0, "Dqs Map CPU to DRAM MC 1 CH 0", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch1, "Dqs Map CPU to DRAM MC 1 CH 1", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch2, "Dqs Map CPU to DRAM MC 1 CH 2", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch3, "Dqs Map CPU to DRAM MC 1 CH 3", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch0, "Dq Map CPU to DRAM MC 0 CH 0", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch1, "Dq Map CPU to DRAM MC 0 CH 1", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch2, "Dq Map CPU to DRAM MC 0 CH 2", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 2: board-dependet"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch3, "Dq Map CPU to DRAM MC 0 CH 3", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch0, "Dq Map CPU to DRAM MC 1 CH 0", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch1, "Dq Map CPU to DRAM MC 1 CH 1", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch2, "Dq Map CPU to DRAM MC 1 CH 2", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch3, "Dq Map CPU to DRAM MC 1 CH 3", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DqPinsInterleaved, "Dqs Pins Interleaved Setting", &EN_DIS,
Help "Indicates DqPinsInterleaved setting: board-dependent"
Combo $gPlatformFspPkgTokenSpaceGuid_SmramMask, "Smram Mask", &gPlatformFspPkgTokenSpaceGuid_SmramMask,
Help "The SMM Regions AB-SEG and/or H-SEG reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_Ibecc, "Ibecc", &EN_DIS,
Help "Enable/Disable Ibecc"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode, "IbeccOperationMode", &gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode,
Help "In-Band ECC Operation Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeEnable, "IbeccProtectedRangeEnable", &EN_DIS,
Help "In-Band ECC Protected Region Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeBase, "IbeccProtectedRangeBase", HEX,
Help "IBECC Protected Region Base"
"Valid range: 0x00000000 ~ 0x03FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeMask, "IbeccProtectedRangeMask", HEX,
Help "IBECC Protected Region Mask"
"Valid range: 0x00000001 ~ 0x03FFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MrcFastBoot, "MRC Fast Boot", &EN_DIS,
Help "Enables/Disable the MRC fast path thru the MRC"
Combo $gPlatformFspPkgTokenSpaceGuid_RmtPerTask, "Rank Margin Tool per Task", &EN_DIS,
Help "This option enables the user to execute Rank Margin Tool per major training step in the MRC."
Combo $gPlatformFspPkgTokenSpaceGuid_TrainTrace, "Training Trace", &EN_DIS,
Help "This option enables the trained state tracing feature in MRC. This feature will print out the key training parameters state across major training steps."
Combo $gPlatformFspPkgTokenSpaceGuid_TsegSize, "Tseg Size", &gPlatformFspPkgTokenSpaceGuid_TsegSize,
Help "Size of SMRAM memory reserved. 0x400000 for Release build and 0x1000000 for Debug build"
EditNum $gPlatformFspPkgTokenSpaceGuid_MmioSize, "MMIO Size", HEX,
Help "Size of MMIO space reserved for devices. 0(Default)=Auto, non-Zero=size in MB"
"Valid range: 0 ~ 0xC00"
Combo $gPlatformFspPkgTokenSpaceGuid_ProbelessTrace, "Probeless Trace", &EN_DIS,
Help "Probeless Trace: 0=Disabled, 1=Enable. Enabling Probeless Trace will reserve 128MB. This also requires IED to be enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_SpdAddressTable, "Spd Address Tabl", HEX,
Help "Specify SPD Address table for CH0D0/CH0D1/CH1D0&CH1D1. MemorySpdPtr will be used if SPD Address is 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UserBd, "Board Type", &gPlatformFspPkgTokenSpaceGuid_UserBd,
Help "MrcBoardType, Options are 0:Mobile, 1:Desktop1Dpc, 2:Desktop2DpcDaisyChain, 3:Desktop2DpcTeeTopologyAsymmetrical, 4:Desktop2DpcTeeTopology, 5:UltMobile, 7:UP Server"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss, "MRC Retraining on RTC Power Loss", &gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss,
Help "Specifies whether MRC memory training will occur when RTC power loss is detected. Options are 0=Memory will be re-trained if RTC power loss is detected. 1=Memory will not be re-trained when RTC power loss is detected. (Typically used on board designs without a dedicated RTC battery)"
Combo $gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit, "DDR Frequency Limit", &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit,
Help "Maximum Memory Frequency Selections in Mhz. Options are 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933 and 0 for Auto."
Combo $gPlatformFspPkgTokenSpaceGuid_SaGv, "SA GV", &gPlatformFspPkgTokenSpaceGuid_SaGv,
Help "System Agent dynamic frequency support and when enabled memory will be training at four different frequencies."
Combo $gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot, "Memory Test on Warm Boot", &gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot,
Help "Run Base Memory Test on Warm Boot"
Combo $gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl, "DDR Speed Control", &gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl,
Help "DDR Frequency and Gear control for all SAGV points."
Combo $gPlatformFspPkgTokenSpaceGuid_RMT, "Rank Margin Tool", &EN_DIS,
Help "Enable/disable Rank Margin Tool."
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch0, "Controller 0 Channel 0 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 0"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch1, "Controller 0 Channel 1 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 1"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch2, "Controller 0 Channel 2 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 2"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch3, "Controller 0 Channel 3 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 3"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch0, "Controller 1 Channel 0 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 0"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch1, "Controller 1 Channel 1 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 1"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch2, "Controller 1 Channel 2 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 2"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch3, "Controller 1 Channel 3 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 3"
Combo $gPlatformFspPkgTokenSpaceGuid_ScramblerSupport, "Scrambler Support", &EN_DIS,
Help "This option enables data scrambling in memory."
Combo $gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected, "SPD Profile Selected", &gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected,
Help "Select DIMM timing profile. Options are 0:Default SPD Profile, 1:Custom Profile, 2:XMP Profile 1, 3:XMP Profile 2, 4:XMP Profile 3, 5:XMP User Profile 4, 6:XMP User Profile 5"
Combo $gPlatformFspPkgTokenSpaceGuid_RefClk, "Memory Reference Clock", &gPlatformFspPkgTokenSpaceGuid_RefClk,
Help "100MHz, 133MHz."
EditNum $gPlatformFspPkgTokenSpaceGuid_VddVoltage, "Memory Voltage", DEC,
Help "DRAM voltage (Vdd) (supply voltage for input buffers and core logic of the DRAM chips) in millivolts from 0 - default to 1435mv."
"Valid range: 0 ~ 1435"
Combo $gPlatformFspPkgTokenSpaceGuid_Ratio, "Memory Ratio", &gPlatformFspPkgTokenSpaceGuid_Ratio,
Help "Automatic or the frequency will equal ratio times reference clock. Set to Auto to recalculate memory timings listed below."
EditNum $gPlatformFspPkgTokenSpaceGuid_tCL, "tCL", HEX,
Help "CAS Latency, 0: AUTO, max: 31. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tCWL, "tCWL", HEX,
Help "Min CAS Write Latency Delay Time, 0: AUTO, max: 34. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x22"
EditNum $gPlatformFspPkgTokenSpaceGuid_tFAW, "tFAW", HEX,
Help "Min Four Activate Window Delay Time, 0: AUTO, max: 63. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRAS, "tRAS", HEX,
Help "RAS Active Time, 0: AUTO, max: 64. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x40"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRCDtRP, "tRCD/tRP", HEX,
Help "RAS to CAS delay time and Row Precharge delay time, 0: AUTO, max: 63. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tREFI, "tREFI", HEX,
Help "Refresh Interval, 0: AUTO, max: 65535. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC, "tRFC", HEX,
Help "Min Refresh Recovery Delay Time, 0: AUTO, max: 1023. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD, "tRRD", HEX,
Help "Min Row Active to Row Active Delay Time, 0: AUTO, max: 15. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRTP, "tRTP", HEX,
Help "Min Internal Read to Precharge Command Delay Time, 0: AUTO, max: 15. DDR4 legal values: 5, 6, 7, 8, 9, 10, 12. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_tWR, "tWR", &gPlatformFspPkgTokenSpaceGuid_tWR,
Help "Min Write Recovery Time, 0: AUTO, legal values: 5, 6, 7, 8, 10, 12, 14, 16, 18, 20, 24, 30, 34, 40. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR, "tWTR", HEX,
Help "Min Internal Write to Read Command Delay Time, 0: AUTO, max: 28. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x1C"
EditNum $gPlatformFspPkgTokenSpaceGuid_NModeSupport, "NMode", HEX,
Help "System command rate, range 0-2, 0 means auto, 1 = 1N, 2 = 2N"
"Valid range: 0x00 ~ 0x02"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaGvGear, "SAGV Gear Ratio", HEX,
Help "Gear Selection for SAGV points. 0 - Auto, 1-1 Gear 1, 2-Gear 2"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaGvFreq, "SAGV Frequency", HEX,
Help "SAGV Frequency per point in Mhz. 0 for Auto and a ratio of 133/100MHz: 1333/1300."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GearRatio, "SAGV Disabled Gear Ratio", HEX,
Help "Gear Selection for SAGV Disabled. 0 - Auto, 1-1 Gear 1, 2-Gear 2"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TxtImplemented, "Enable/Disable MRC TXT dependency", &EN_DIS,
Help "When enabled MRC execution will wait for TXT initialization to be done first. Disabled(0x0)(Default): MRC will not wait for TXT initialization, Enabled(0x1): MRC will wait for TXT initialization"
Combo $gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming, "Realtime Memory Timing", &gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming,
Help "0(Default): Disabled, 1: Enabled. When enabled, it will allow the system to perform realtime memory timing changes after MRC_DONE."
EditNum $gPlatformFspPkgTokenSpaceGuid_VddqVoltage, "Memory VDDQ Voltage", DEC,
Help "DRAM voltage (Vddq) (supply voltage for DQ/DQS of the DRAM chips) in millivolts from 0 - default to 1435mv."
"Valid range: 0 ~ 1435"
EditNum $gPlatformFspPkgTokenSpaceGuid_VppVoltage, "Memory VPP Voltage", DEC,
Help "DRAM voltage (Vpp) (supply voltage for VPP of the DRAM chips) in millivolts from 0 - default to 2135mv."
"Valid range: 0 ~ 2135"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieNewFom, "CPU PCIe New FOM", &EN_DIS,
Help "Enable/Disable NewFom for DEKEL Programming. 0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiNewFom, "DMI DEKEL New FOM", &EN_DIS,
Help "Enable/Disable NewFom for DEKEL Programming. 0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DynamicMemoryBoost, "Dynamic Memory Boost", &EN_DIS,
Help "0(Default): Disable, 1: Enable. When enabled, MRC will train the Default SPD Profile, and also the profile selected by SpdProfileSelected, to allow automatic switching during runtime. Only valid if SpdProfileSelected is an XMP Profile, otherwise ignored."
EditNum $gPlatformFspPkgTokenSpaceGuid_HgSupport, "Hybrid Graphics Support ", HEX,
Help "0(Default): PEG10, 1: PEG60, 2:PEG62. Help to select Hybrid Graphics Support on Peg Port"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryFrequency, "Realtime Memory Frequency", &EN_DIS,
Help "0(Default): Disabled, 1: Enabled. Ignored unless SpdProfileSelected is an XMP Profile. If enabled, MRC will train the Default SPD Profile, and also the selected XMP Profile, to allow manually triggered switching between frequencies at runtime."
Combo $gPlatformFspPkgTokenSpaceGuid_OCSafeMode, "OC Safe Mode", &EN_DIS,
Help "0: Disabled, 1(Default): Enabled. Ignored unless SpdProfileSelected is an XMP Profile. If enabled, MRC will use less aggressive controls when training memory."
Combo $gPlatformFspPkgTokenSpaceGuid_SaPreMemProductionRsvd, "SaPreMemProductionRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Production"
Combo $gPlatformFspPkgTokenSpaceGuid_GtClosEnable, "Enable Gt CLOS", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed, "DMI Max Link Speed", &gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed,
Help "Auto (Default)(0x0): Maximum possible link speed, Gen1(0x1): Limit Link to Gen1 Speed, Gen2(0x2): Limit Link to Gen2 Speed, Gen3(0x3):Limit Link to Gen3 Speed"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable, "DMI Equalization Phase 2", &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable,
Help "DMI Equalization Phase 2. (0x0): Disable phase 2, (0x1): Enable phase 2, (0x2)(Default): AUTO - Use the current default method"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method, "DMI Gen3 Equalization Phase3", &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method,
Help "DMI Gen3 Equalization Phase3. Auto(0x0)(Default): Use the current default method, HwEq(0x1): Use Adaptive Hardware Equalization, SwEq(0x2): Use Adaptive Software Equalization (Implemented in BIOS Reference Code), Static(0x3): Use the Static EQs provided in DmiGen3EndPointPreset array for Phase1 AND Phase3 (Instead of just Phase1), Disabled(0x4): Bypass Equalization Phase 3"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3ProgramStaticEq, "Enable/Disable DMI GEN3 Static EQ Phase1 programming", &EN_DIS,
Help "Program DMI Gen3 EQ Phase1 Static Presets. Disabled(0x0): Disable EQ Phase1 Static Presets Programming, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis, "DeEmphasis control for DMI", &gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis,
Help "DeEmphasis control for DMI. 0=-6dB, 1(Default)=-3.5 dB"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3RootPortPreset, "DMI Gen3 Root port preset values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointPreset, "DMI Gen3 End port preset values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointHint, "DMI Gen3 End port Hint values per lane", HEX,
Help "Used for programming DMI Gen3 Hint values per lane. Range: 0-6, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3RxCtlePeaking, "DMI Gen3 RxCTLEp per-Bundle control", HEX,
Help "Range: 0-15, 0 is default for each bundle, must be specified based upon platform design"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspm, "DMI ASPM Configuration:{Combo", HEX,
Help "Set ASPM Configuration"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiHweq, "Enable/Disable DMI GEN3 Hardware Eq", &EN_DIS,
Help "Enable/Disable DMI GEN3 Hardware Eq. Disabled(0x0)(Default): Disable Hardware Eq, Enabled(0x1): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase23Bypass, "Enable/Disable CPU DMI GEN3 Phase 23 Bypass", &EN_DIS,
Help "CPU DMI GEN3 Phase 23 Bypass. Disabled(0x0)(Default): Disable Phase 23 Bypass, Enabled(0x1): Enable Phase 23 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase3Bypass, "Enable/Disable CPU DMI GEN3 Phase 3 Bypass", &EN_DIS,
Help "CPU DMI GEN3 Phase 3 Bypass. Disabled(0x0)(Default): Disable Phase 3 Bypass, Enabled(0x1): Enable Phase 3 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3LtcoEnable, "Enable/Disable CPU DMI Gen3 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0)(Default): Disable Local Transmitter Coefficient Override, Enabled(0x1): Enable Local Transmitter Coefficient Override"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3RtcoRtpoEnable, "Enable/Disable CPU DMI Gen3 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpre, "DMI Gen3 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen3 Transmitter Pre-Cursor Coefficient . Range: 0-10, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpo, "DMI Gen3 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming Transmitter Post-Cursor Coefficient. Range: 0-9, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCm, "PCIE Hw Eq Gen3 CoeffList Cm", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCp, "PCIE Hw Eq Gen3 CoeffList Cp", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPresetEnable, "Enable/Disable DMI GEN3 DmiGen3DsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN3 DmiGen3DsPreset. Auto(0x0)(Default): DmiGen3DsPresetEnable, Manual(0x1): Enable DmiGen3DsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortRxPreset, "DMI Gen3 Root port preset Rx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 1 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortTxPreset, "DMI Gen3 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPresetEnable, "Enable/Disable DMI GEN3 DmiGen3UsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN3 DmiGen3UsPreset. Auto(0x0)(Default): DmiGen3UsPresetEnable, Manual(0x1): Enable DmiGen3UsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortRxPreset, "DMI Gen3 Root port preset Rx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortTxPreset, "DMI Gen3 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCm, "DMI Hw Eq Gen4 CoeffList Cm", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCp, "DMI Hw Eq Gen4 CoeffList Cp", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase23Bypass, "Enable/Disable CPU DMI GEN4 Phase 23 Bypass", &EN_DIS,
Help "CPU DMI GEN4 Phase 23 Bypass. Disabled(0x0)(Default): Disable Phase 23 Bypass, Enabled(0x1): Enable Phase 23 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase3Bypass, "Enable/Disable CPU DMI GEN4 Phase 3 Bypass", &EN_DIS,
Help "CPU DMI GEN3 Phase 4 Bypass. Disabled(0x0)(Default): Disable Phase 3 Bypass, Enabled(0x1): Enable Phase 3 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPresetEnable, "Enable/Disable DMI GEN4 DmiGen4DsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN4 DmiGen4DsPreset. Auto(0x0)(Default): DmiGen4DsPresetEnable, Manual(0x1): Enable DmiGen4DsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPortTxPreset, "DMI Gen4 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen4 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4RtcoRtpoEnable, "Enable/Disable CPU DMI Gen4 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4LtcoEnable, "Enable/Disable CPU DMI Gen4 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0)(Default): Disable Local Transmitter Coefficient Override, Enabled(0x1): Enable Local Transmitter Coefficient Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpre, "DMI Gen4 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen4 Transmitter Pre-Cursor Coefficient . Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpo, "DMI Gen4 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming DMI Gen4 Transmitter Post-Cursor Coefficient. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPresetEnable, "Enable/Disable DMI GEN4 DmiGen4UsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN4 DmiGen4UsPreset. Auto(0x0)(Default): DmiGen4UsPresetEnable, Manual(0x1): Enable DmiGen4UsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPortTxPreset, "DMI Gen4 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen4 preset values per lane. Range: 0-10, 1 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspmCtrl, "DMI ASPM Control Configuration:{Combo", HEX,
Help "Set ASPM Control configuration"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspmL1ExitLatency, "DMI ASPM L1 exit Latency", HEX,
Help "Range: 0-7, 4 is default L1 exit Latency"
"Valid range: 0x00 ~ 0x07"
Combo $gPlatformFspPkgTokenSpaceGuid_SiSkipOverrideBootModeWhenFwUpdate, "Skip override boot mode When Fw Update.", &EN_DIS,
Help "When set to TRUE and boot mode is BOOT_ON_FLASH_UPDATE, skip setting boot mode to BOOT_WITH_FULL_CONFIGURATION in PEI memory init."
Combo $gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup, "TSC HW Fixup disable", &gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup,
Help "TSC HW Fixup disable during TSC copy from PMA to APIC. <b>0: Enable</b>; 1: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_IaIccUnlimitedMode, "Support IA Unlimited ICCMAX", &EN_DIS,
Help "Support IA Unlimited ICCMAX up to maximum value 512A; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_IaIccMax, "IA ICCMAX", HEX,
Help "IA ICCMAX value is represented in 1/4 A increments. A value of 400 = 100A. <b>0 (HW default)</b>. Range is 4-2047."
"Valid range: 0x00 ~ 0x7FF"
Combo $gPlatformFspPkgTokenSpaceGuid_GtIccUnlimitedMode, "Support GT Unlimited ICCMAX", &EN_DIS,
Help "Support GT Unlimited ICCMAX up to maximum value 512A; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_GtIccMax, "GT ICCMAX", HEX,
Help "GT ICCMAX value is represented in 1/4 A increments. A value of 400 = 100A. <b>0 (HW default)</b>. Range is 4-2047."
"Valid range: 0x00 ~ 0x7FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold0, "TVB Down Bins for Temp Threshold 0", DEC,
Help "Down Bins (delta) for Temperature Threshold 0. When running above Temperature Threshold 0, the ratio will be clipped by MAX_RATIO[n]-This value, when TVB ratio clipping is enabled. Default is 1."
"Valid range: 0 ~ 10"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold0, "TVB Temperature Threshold 0", DEC,
Help "TVB Temp (degrees C) - Temperature Threshold 0. Running ABOVE this temperature will clip delta Down Bins for Threshold 0 from the resolved OC Ratio, when TVB ratio clipping is enabled. Default is 70."
"Valid range: 0 ~ 100"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold1, "TVB Temperature Threshold 1", DEC,
Help "TVB Temp (degrees C) - Temperature Threshold 1. Running ABOVE this temperature will clip delta Down Bins for Threshold 1 from the resolved OC Ratio, when TVB ratio clipping is enabled. Default is 100."
"Valid range: 0 ~ 100"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold1, "TVB Down Bins for Temp Threshold 1", DEC,
Help "Down Bins (delta) for Temperature Threshold 1. When running above Temperature Threshold 1, the ratio will be clipped by MAX_RATIO[n]-Down Bin Threshold 1-This value, when TVB ratio clipping is enabled. Default is 2."
"Valid range: 0 ~ 10"
Combo $gPlatformFspPkgTokenSpaceGuid_FllOcModeEn, "FLL Overclock Mode Enable", &EN_DIS,
Help "Select FLL Mode Value from 0 to 3. 0x0 = no overclocking, 0x1 = ratio overclocking with nominal (0.5-1x) reference clock frequency, 0x2 = BCLK overclocking with elevated (1-3x) reference clock frequency, 0x3 = BCLK overclocking with extreme elevated (3-5x) reference clock frequency and ratio limited to 63."
EditNum $gPlatformFspPkgTokenSpaceGuid_FllOverclockMode, "FLL Overclock Mode", HEX,
Help "Select FLL Mode Value from 0 to 3. 0x0 = no overclocking, 0x1 = ratio overclocking with nominal (0.5-1x) reference clock frequency, 0x2 = BCLK overclocking with elevated (1-3x) reference clock frequency, 0x3 = BCLK overclocking with extreme elevated (3-5x) reference clock frequency and ratio limited to 63."
"Valid range: 0x0 ~ 0x3"
EditNum $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel, "Configuration for boot TDP selection", HEX,
Help "Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP Up;0xFF : Deactivate"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CustomPowerLimit1, "Short term Power Limit value for custom cTDP level 1", HEX,
Help "Short term Power Limit value for custom cTDP level 1. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
Combo $gPlatformFspPkgTokenSpaceGuid_Etvb, "Enhanced Thermal Turbo Mode", &EN_DIS,
Help "When eTVB mode is enabled user will be clipped when temperatures reach 70C <b>0: Disabled</b>; 1: Enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_UnderVoltProtection, "UnderVolt Protection", &EN_DIS,
Help "When UnderVolt Protection is enabled, user will be not be able to program under voltage in OS runtime. 0: Disabled; <b>1: Enabled</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPreMem, "ReservedCpuPreMem", &EN_DIS,
Help "Reserved for Cpu Pre-Mem"
EditNum $gPlatformFspPkgTokenSpaceGuid_MrcSafeConfig, "MRC Safe Config", HEX,
Help "Enables/Disable MRC Safe Config"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_HobBufferSize, "HobBufferSize", &gPlatformFspPkgTokenSpaceGuid_HobBufferSize,
Help "Size to set HOB Buffer. 0:Default, 1: 1 Byte, 2: 1 KB, 3: Max value(assuming 63KB total HOB size)."
Combo $gPlatformFspPkgTokenSpaceGuid_ECT, "Early Command Training", &EN_DIS,
Help "Enables/Disable Early Command Training"
Combo $gPlatformFspPkgTokenSpaceGuid_SOT, "SenseAmp Offset Training", &EN_DIS,
Help "Enables/Disable SenseAmp Offset Training"
Combo $gPlatformFspPkgTokenSpaceGuid_ERDMPRTC2D, "Early ReadMPR Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Early ReadMPR Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDMPRT, "Read MPR Training", &EN_DIS,
Help "Enables/Disable Read MPR Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RCVET, "Receive Enable Training", &EN_DIS,
Help "Enables/Disable Receive Enable Training"
Combo $gPlatformFspPkgTokenSpaceGuid_JWRL, "Jedec Write Leveling", &EN_DIS,
Help "Enables/Disable Jedec Write Leveling"
Combo $gPlatformFspPkgTokenSpaceGuid_EWRTC2D, "Early Write Time Centering 2D", &EN_DIS,
Help "Enables/Disable Early Write Time Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_ERDTC2D, "Early Read Time Centering 2D", &EN_DIS,
Help "Enables/Disable Early Read Time Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTC1D, "Write Timing Centering 1D", &EN_DIS,
Help "Enables/Disable Write Timing Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRVC1D, "Write Voltage Centering 1D", &EN_DIS,
Help "Enables/Disable Write Voltage Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDTC1D, "Read Timing Centering 1D", &EN_DIS,
Help "Enables/Disable Read Timing Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMODTT, "Dimm ODT Training", &EN_DIS,
Help "Enables/Disable Dimm ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMRONT, "DIMM RON Training", &EN_DIS,
Help "Enables/Disable DIMM RON Training"
Combo $gPlatformFspPkgTokenSpaceGuid_WRDSEQT, "Write Drive Strength/Equalization 2D", &EN_DIS,
Help "Enables/Disable Write Drive Strength/Equalization 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRSRT, "Write Slew Rate Training", &EN_DIS,
Help "Enables/Disable Write Slew Rate Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDODTT, "Read ODT Training", &EN_DIS,
Help "Enables/Disable Read ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDEQT, "Read Equalization Training", &EN_DIS,
Help "Enables/Disable Read Equalization Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDAPT, "Read Amplifier Training", &EN_DIS,
Help "Enables/Disable Read Amplifier Training"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTC2D, "Write Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Write Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDTC2D, "Read Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Read Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRVC2D, "Write Voltage Centering 2D", &EN_DIS,
Help "Enables/Disable Write Voltage Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVC2D, "Read Voltage Centering 2D", &EN_DIS,
Help "Enables/Disable Read Voltage Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDVC, "Command Voltage Centering", &EN_DIS,
Help "Enables/Disable Command Voltage Centering"
Combo $gPlatformFspPkgTokenSpaceGuid_LCT, "Late Command Training", &EN_DIS,
Help "Enables/Disable Late Command Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RTL, "Round Trip Latency Training", &EN_DIS,
Help "Enables/Disable Round Trip Latency Training"
Combo $gPlatformFspPkgTokenSpaceGuid_TAT, "Turn Around Timing Training", &EN_DIS,
Help "Enables/Disable Turn Around Timing Training"
Combo $gPlatformFspPkgTokenSpaceGuid_MEMTST, "Memory Test", &EN_DIS,
Help "Enables/Disable Memory Test"
Combo $gPlatformFspPkgTokenSpaceGuid_ALIASCHK, "DIMM SPD Alias Test", &EN_DIS,
Help "Enables/Disable DIMM SPD Alias Test"
Combo $gPlatformFspPkgTokenSpaceGuid_RCVENC1D, "Receive Enable Centering 1D", &EN_DIS,
Help "Enables/Disable Receive Enable Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_RMC, "Retrain Margin Check", &EN_DIS,
Help "Enables/Disable Retrain Margin Check"
Combo $gPlatformFspPkgTokenSpaceGuid_WRDSUDT, "Write Drive Strength Up/Dn independently", &EN_DIS,
Help "Enables/Disable Write Drive Strength Up/Dn independently"
Combo $gPlatformFspPkgTokenSpaceGuid_EccSupport, "ECC Support", &EN_DIS,
Help "Enables/Disable ECC Support"
Combo $gPlatformFspPkgTokenSpaceGuid_RemapEnable, "Memory Remap", &EN_DIS,
Help "Enables/Disable Memory Remap"
Combo $gPlatformFspPkgTokenSpaceGuid_RankInterleave, "Rank Interleave support", &EN_DIS,
Help "Enables/Disable Rank Interleave support. NOTE: RI and HORI can not be enabled at the same time."
Combo $gPlatformFspPkgTokenSpaceGuid_EnhancedInterleave, "Enhanced Interleave support", &EN_DIS,
Help "Enables/Disable Enhanced Interleave support"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashEnable, "Ch Hash Support", &EN_DIS,
Help "Enable/Disable Channel Hash Support. NOTE: ONLY if Memory interleaved Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashOverride, "Ch Hash Settings Override", &EN_DIS,
Help "Channel Hash Settings Override"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableExtts, "Extern Therm Status", &EN_DIS,
Help "Enables/Disable Extern Therm Status"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePwrDn, "DDR PowerDown and idle counter", &EN_DIS,
Help "Enables/Disable DDR PowerDown and idle counter(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePwrDnLpddr, "DDR PowerDown and idle counter", &EN_DIS,
Help "Enables/Disable DDR PowerDown and idle counter(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_SrefCfgEna, "SelfRefresh Enable", &EN_DIS,
Help "Enables/Disable SelfRefresh Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeatLpddr, "Throttler CKEMin Defeature", &EN_DIS,
Help "Enables/Disable Throttler CKEMin Defeature(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeat, "Throttler CKEMin Defeature", &EN_DIS,
Help "Enables/Disable Throttler CKEMin Defeature"
Combo $gPlatformFspPkgTokenSpaceGuid_RhSelect, "Row Hammer Select", &gPlatformFspPkgTokenSpaceGuid_RhSelect,
Help "Row Hammer Select"
Combo $gPlatformFspPkgTokenSpaceGuid_ExitOnFailure, "Exit On Failure (MRC)", &EN_DIS,
Help "Enables/Disable Exit On Failure (MRC)"
Combo $gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1, "New Features 1 - MRC", &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1,
Help "New Feature Enabling 1, <b>0:Disable</b>, 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2, "New Features 2 - MRC", &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2,
Help "New Feature Enabling 2, <b>0:Disable</b>, 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DCC, "Duty Cycle Correction Training", &EN_DIS,
Help "Enable/Disable Duty Cycle Correction Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVC1D, "Read Voltage Centering 1D", &EN_DIS,
Help "Enable/Disable Read Voltage Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_TXTCO, "TxDqTCO Comp Training", &EN_DIS,
Help "Enable/Disable TxDqTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CLKTCO, "ClkTCO Comp Training", &EN_DIS,
Help "Enable/Disable ClkTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDSR, "CMD Slew Rate Training", &EN_DIS,
Help "Enable/Disable CMD Slew Rate Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDDSEQ, "CMD Drive Strength and Tx Equalization", &EN_DIS,
Help "Enable/Disable CMD Drive Strength and Tx Equalization"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMODTCA, "DIMM CA ODT Training", &EN_DIS,
Help "Enable/Disable DIMM CA ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_TXTCODQS, "TxDqsTCO Comp Training", &EN_DIS,
Help "Enable/Disable TxDqsTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDDRUD, "CMD/CTL Drive Strength Up/Dn 2D", &EN_DIS,
Help "Enable/Disable CMD/CTL Drive Strength Up/Dn 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_VCCDLLBP, "VccDLL Bypass Training", &EN_DIS,
Help "Enable/Disable VccDLL Bypass Training"
Combo $gPlatformFspPkgTokenSpaceGuid_PVTTDNLP, "PanicVttDnLp Training", &EN_DIS,
Help "Enable/Disable PanicVttDnLp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVREFDC, "Read Vref Decap Training*", &EN_DIS,
Help "Enable/Disable Read Vref Decap Training*"
Combo $gPlatformFspPkgTokenSpaceGuid_VDDQT, "Vddq Training", &EN_DIS,
Help "Enable/Disable Vddq Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RMTBIT, "Rank Margin Tool Per Bit", &EN_DIS,
Help "Enable/Disable Rank Margin Tool Per Bit"
Combo $gPlatformFspPkgTokenSpaceGuid_EccDftEn, "ECC DFT feature", &EN_DIS,
Help "Enables/Disable ECC DFT feature"
Combo $gPlatformFspPkgTokenSpaceGuid_Write0, "Write0 feature", &EN_DIS,
Help "Enables/Disable Write0 feature"
Combo $gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedClock, "Select if CLK0 is shared between Rank0 and Rank1 in DDR4 DDP", &EN_DIS,
Help "Select if CLK0 is shared between Rank0 and Rank1 in DDR4 DDP"
Combo $gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedZq, "Select if ZQ pin is shared between Rank0 and Rank1 in DDR4 DDP", &EN_DIS,
Help "ESelect if ZQ pin is shared between Rank0 and Rank1 in DDR4 DDP"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit, "Ch Hash Interleaved Bit", &gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit,
Help "Select the BIT to be used for Channel Interleaved mode. NOTE: BIT7 will interlave the channels at a 2 cacheline granularity, BIT8 at 4 and BIT9 at 8. Default is BIT8"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChHashMask, "Ch Hash Mask", HEX,
Help "Set the BIT(s) to be included in the XOR function. NOTE BIT mask corresponds to BITS [19:6] Default is 0x30CC"
"Valid range: 0x0000 ~ 0x3FFF"
Combo $gPlatformFspPkgTokenSpaceGuid_BClkFrequency, "Base reference clock value", &gPlatformFspPkgTokenSpaceGuid_BClkFrequency,
Help "Base reference clock value, in Hertz(Default is 100Hz)"
EditNum $gPlatformFspPkgTokenSpaceGuid_Idd3n, "EPG DIMM Idd3N", HEX,
Help "Active standby current (Idd3N) in milliamps from datasheet. Must be calculated on a per DIMM basis. Default is 26"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_Idd3p, "EPG DIMM Idd3P", HEX,
Help "Active power-down current (Idd3P) in milliamps from datasheet. Must be calculated on a per DIMM basis. Default is 11"
"Valid range: 0x00 ~ 0x7D0"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDNORM, "CMD Normalization", &EN_DIS,
Help "Enable/Disable CMD Normalization"
Combo $gPlatformFspPkgTokenSpaceGuid_EWRDSEQ, "Early DQ Write Drive Strength and Equalization Training", &EN_DIS,
Help "Enable/Disable Early DQ Write Drive Strength and Equalization Training"
Combo $gPlatformFspPkgTokenSpaceGuid_McRefresh2X, "MC_REFRESH_2X_MODE", &EN_DIS,
Help "DEPRECATED"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm0, "Idle Energy Mc0Ch0Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm1, "Idle Energy Mc0Ch0Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm0, "Idle Energy Mc0Ch1Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm1, "Idle Energy Mc0Ch1Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm0, "Idle Energy Mc1Ch0Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm1, "Idle Energy Mc1Ch0Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm0, "Idle Energy Mc1Ch1Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm1, "Idle Energy Mc1Ch1Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm0, "PowerDown Energy Mc0Ch0Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm1, "PowerDown Energy Mc0Ch0Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm0, "PowerDown Energy Mc0Ch1Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm1, "PowerDown Energy Mc0Ch1Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm0, "PowerDown Energy Mc1Ch0Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm1, "PowerDown Energy Mc1Ch0Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm0, "PowerDown Energy Mc1Ch1Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm1, "PowerDown Energy Mc1Ch1Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm0, "Activate Energy Mc0Ch0Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm1, "Activate Energy Mc0Ch0Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm0, "Activate Energy Mc0Ch1Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm1, "Activate Energy Mc0Ch1Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm0, "Activate Energy Mc1Ch0Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm1, "Activate Energy Mc1Ch0Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm0, "Activate Energy Mc1Ch1Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm1, "Activate Energy Mc1Ch1Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm0, "Read Energy Mc0Ch0Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm1, "Read Energy Mc0Ch0Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm0, "Read Energy Mc0Ch1Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm1, "Read Energy Mc0Ch1Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm0, "Read Energy Mc1Ch0Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm1, "Read Energy Mc1Ch0Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm0, "Read Energy Mc1Ch1Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm1, "Read Energy Mc1Ch1Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm0, "Write Energy Mc0Ch0Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm1, "Write Energy Mc0Ch0Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm0, "Write Energy Mc0Ch1Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm1, "Write Energy Mc0Ch1Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm0, "Write Energy Mc1Ch0Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm1, "Write Energy Mc1Ch0Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm0, "Write Energy Mc1Ch1Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm1, "Write Energy Mc1Ch1Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmr, "Throttler CKEMin Timer", HEX,
Help "Timer value for CKEMin, range[255;0]. Req'd min of SC_ROUND_T + BYTE_LENGTH (4). Dfault is 0x00"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_AllowOppRefBelowWriteThrehold, "Allow Opp Ref Below Write Threhold", &EN_DIS,
Help "Allow opportunistic refreshes while we don't exit power down."
EditNum $gPlatformFspPkgTokenSpaceGuid_WriteThreshold, "Write Threshold", HEX,
Help "Number of writes that can be accumulated while CKE is low before CKE is asserted."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh0, "Rapl Power Floor Ch0", HEX,
Help "Power budget ,range[255;0],(0= 5.3W Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh1, "Rapl Power Floor Ch1", HEX,
Help "Power budget ,range[255;0],(0= 5.3W Def)"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnCmdRate, "Command Rate Support", &gPlatformFspPkgTokenSpaceGuid_EnCmdRate,
Help "CMD Rate and Limit Support Option. NOTE: ONLY supported in 1N Mode, Default is 3 CMDs"
Combo $gPlatformFspPkgTokenSpaceGuid_Refresh2X, "REFRESH_2X_MODE", &gPlatformFspPkgTokenSpaceGuid_Refresh2X,
Help "0- (Default)Disabled 1-iMC enables 2xRef when Warm and Hot 2- iMC enables 2xRef when Hot"
Combo $gPlatformFspPkgTokenSpaceGuid_EpgEnable, "Energy Performance Gain", &EN_DIS,
Help "Enable/disable(default) Energy Performance Gain."
EditNum $gPlatformFspPkgTokenSpaceGuid_Lfsr0Mask, "RH pTRR LFSR0 Mask", HEX,
Help "Row Hammer pTRR LFSR0 Mask, 1/2^(value)"
"Valid range: 0x01 ~ 0xF"
Combo $gPlatformFspPkgTokenSpaceGuid_UserThresholdEnable, "User Manual Threshold", &EN_DIS,
Help "Disabled: Predefined threshold will be used.\nEnabled: User Input will be used."
Combo $gPlatformFspPkgTokenSpaceGuid_UserBudgetEnable, "User Manual Budget", &EN_DIS,
Help "Disabled: Configuration of memories will defined the Budget value.\nEnabled: User Input will be used."
Combo $gPlatformFspPkgTokenSpaceGuid_PowerDownMode, "Power Down Mode", &gPlatformFspPkgTokenSpaceGuid_PowerDownMode,
Help "This option controls command bus tristating during idle periods"
EditNum $gPlatformFspPkgTokenSpaceGuid_PwdwnIdleCounter, "Pwr Down Idle Timer", HEX,
Help "The minimum value should = to the worst case Roundtrip delay + Burst_Length. 0 means AUTO: 64 for ULX/ULT, 128 for DT/Halo"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout, "Page Close Idle Timeout", &gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout,
Help "This option controls Page Close Idle Timeout"
EditNum $gPlatformFspPkgTokenSpaceGuid_CmdRanksTerminated, "Bitmask of ranks that have CA bus terminated", HEX,
Help "Offset 225 LPDDR4: Bitmask of ranks that have CA bus terminated. <b>0x01=Default, Rank0 is terminating and Rank1 is non-terminating</b>"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SafeMode, "Safe Mode Support", &EN_DIS,
Help "This option configures the varous items in the IO and MC to be more conservative.(def=Disable)"
Combo $gPlatformFspPkgTokenSpaceGuid_CleanMemory, "Ask MRC to clear memory content", &EN_DIS,
Help "Ask MRC to clear memory content <b>0: Do not Clear Memory;</b> 1: Clear Memory."
Combo $gPlatformFspPkgTokenSpaceGuid_LpDdrDqDqsReTraining, "LpDdrDqDqsReTraining", &EN_DIS,
Help "Enable/Disable TxDqDqs ReTraining for LP4/5 and DDR5"
EditNum $gPlatformFspPkgTokenSpaceGuid_RMTLoopCount, "RMTLoopCount", HEX,
Help "Specifies the Loop Count to be used during Rank Margin Tool Testing. 0 - AUTO"
"Valid range: 0 ~ 0x20"
EditNum $gPlatformFspPkgTokenSpaceGuid_BclkRfiFreq, "BCLK RFI Frequency", HEX,
Help "Bclk RFI Frequency for each SAGV point in Hz units. 98000000Hz = 98MHz <b>0 - No RFI Tuning</b>. Range is 98Mhz-100Mhz."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RefreshPanicWm, "REFRESH_PANIC_WM", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RefreshHpWm, "REFRESH_HP_WM", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lp5CccConfig, "Command Pins Mapping", HEX,
Help "BitMask where bits [3:0] are Controller 0 Channel [3:0] and bits [7:4] are Controller 1 Channel [3:0]. 0 = CCC pin mapping is Ascending, 1 = CCC pin mapping is Descending."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CmdMirror, "Command Pins Mirrored", HEX,
Help "BitMask where bits [3:0] are Controller 0 Channel [3:0] and bits [7:4] are Controller 1 Channel [3:0]. 0 = No Command Mirror and 1 = Command Mirror."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMDFE, "DIMM DFE Training", &EN_DIS,
Help "Enable/Disable DIMM DFE Training"
Combo $gPlatformFspPkgTokenSpaceGuid_ExtendedBankHashing, "Extended Bank Hashing", &EN_DIS,
Help "Enable/Disable Extended Bank Hashing"
Combo $gPlatformFspPkgTokenSpaceGuid_RefreshWm, "Refresh Watermarks", &gPlatformFspPkgTokenSpaceGuid_RefreshWm,
Help "Refresh Watermarks: 0-Low, 1-High (default)"
Combo $gPlatformFspPkgTokenSpaceGuid_McRefreshRate, "MC_REFRESH_RATE", &gPlatformFspPkgTokenSpaceGuid_McRefreshRate,
Help "Type of Refresh Rate used to prevent Row Hammer. Default is NORMAL Refresh"
Combo $gPlatformFspPkgTokenSpaceGuid_PeriodicDcc, "Periodic DCC", &EN_DIS,
Help "Enable/Disable Periodic DCC; default: Disabled"
Combo $gPlatformFspPkgTokenSpaceGuid_LpMode, "LpMode", &gPlatformFspPkgTokenSpaceGuid_LpMode,
Help "LpMode feature"
Combo $gPlatformFspPkgTokenSpaceGuid_TXDQSDCC, "TX DQS DCC Training", &EN_DIS,
Help "Enable/Disable TX DQS DCC Training"
Combo $gPlatformFspPkgTokenSpaceGuid_DRAMDCA, "DRAM DCA Training", &EN_DIS,
Help "Enable/Disable DRAM DCA Training"
Combo $gPlatformFspPkgTokenSpaceGuid_EARLYDIMMDFE, "EARLY DIMM DFE Training", &EN_DIS,
Help "Enable/Disable EARLY DIMM DFE Training"
Combo $gPlatformFspPkgTokenSpaceGuid_BdatEnable, "Generate BIOS Data ACPI Table", &EN_DIS,
Help "Enable: Generate BDAT for MRC RMT or SA PCIe data. Disable (Default): Do not generate it"
Combo $gPlatformFspPkgTokenSpaceGuid_LockPTMregs, "Lock PCU Thermal Management registers", &EN_DIS,
Help "Lock PCU Thermal Management registers. Enable(Default)=1, Disable=0"
Combo $gPlatformFspPkgTokenSpaceGuid_PegGen3Rsvd, "Rsvd", &EN_DIS,
Help "Disable(0x0)(Default): Normal Operation - RxCTLE adaptive behavior enabled, Enable(0x1): Override RxCTLE - Disable RxCTLE adaptive behavior to keep the configured RxCTLE peak values unmodified"
Combo $gPlatformFspPkgTokenSpaceGuid_PanelPowerEnable, "Panel Power Enable", &EN_DIS,
Help "Control for enabling/disabling VDD force bit (Required only for early enabling of eDP panel). 0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_BdatTestType, "BdatTestType", &gPlatformFspPkgTokenSpaceGuid_BdatTestType,
Help "Indicates the type of Memory Training data to populate into the BDAT ACPI table."
Combo $gPlatformFspPkgTokenSpaceGuid_DRAMEMPHASIS, "DRAMEMPHASIS Training", &EN_DIS,
Help "Enable/Disable DRAMEMPHASIS Training"
Combo $gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board, "Reuse Adl DDR5 Board or not", &gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board,
Help "Indicate whether adl ddr5 board is reused."
Combo $gPlatformFspPkgTokenSpaceGuid_OemT12DelayOverride, "Oem T12 Delay Override", &EN_DIS,
Help "Oem T12 Delay Override. 0(Default)=Disable 1=Enable "
Combo $gPlatformFspPkgTokenSpaceGuid_DQSOFFSETADJUST, "DQS Offset Adjust Training", &EN_DIS,
Help "Enable/Disable DQS Offset Adjust Training"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPreMemTestRsvd, "SaPreMemTestRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Test"
Combo $gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck, "Margin Limit Check", &gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck,
Help "Margin Limit Check. Choose level of margin check"
EditNum $gPlatformFspPkgTokenSpaceGuid_MarginLimitL2, "Margin Limit L2", HEX,
Help "% of L1 check for margin limit check"
"Valid range: 0x01 ~ 0x12C"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpCdrRelock, "DEKEL CDR Relock", HEX,
Help "Enable/Disable CDR Relock. 0: Disable(Default); 1: Enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiCdrRelock, "DMI DEKEL CDR Relock", &EN_DIS,
Help "Enable/Disable CPU DMI CDR Relock. 0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl, "IbeccErrInjControl", &gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl,
Help "IBECC Error Injection Control"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSlotImplemented, "CPU PCIe root port connection type", HEX,
Help "0: built-in device, 1:slot"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PprRunOnce, "Ppr Run Once", &gPlatformFspPkgTokenSpaceGuid_PprRunOnce,
Help "Enable PPR Run Once 0:Disable, <b>1:Enable<b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PPR, "Post Package Repair", &EN_DIS,
Help "Enables/Disable Post Package Repair"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjAddress, "IbeccErrInjAddress", HEX,
Help "Address to match against for ECC error injection"
"Valid range: 0x0 ~ 0x3FFFFFFFFFC0"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjMask, "IbeccErrInjMask", HEX,
Help "Mask to match against for ECC error injection"
"Valid range: 0x0 ~ 0x3FFFFFFFFFC0"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjCount, "IbeccErrInjCount", HEX,
Help "Number of transactions between ECC error injection"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EnableDmaBuffer, "Pointer EnableDmaBuffer", HEX,
Help "Pointer of EnableDmaBuffer Callback Function."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PllMaxBandingRatio, "PLL Max Banding Ratio", HEX,
Help "DEPRECATED"
"Valid range: 0x0 ~ 0x78"
EditNum $gPlatformFspPkgTokenSpaceGuid_DebugValue, "Debug Value", HEX,
Help "Debug Value"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BoardGpioTablePreMemAddress, "Pre-Mem GPIO table address", HEX,
Help "AlderLake S needs to assert PCIe SLOT RTD3 and PEG reset pins in early PreMem phase. 0: Skip FSP PCIe pins programming. Refer to mAdlSPcieRstPinGpioTable[] in GpioSampleDef.h."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFCpb, "tRFCpb", HEX,
Help "Min Internal per bank refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC2, "tRFC2", HEX,
Help "Min Internal refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC4, "tRFC4", HEX,
Help "Min Internal refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD_L, "tRRD_L", HEX,
Help "Min Internal row active to row active delay time for same bank groups, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD_S, "tRRD_S", HEX,
Help "Min Internal row active to row active delay time for different bank groups, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR_L, "tWTR_L", HEX,
Help "Min Internal write to read command delay time for same bank groups, 0: AUTO, max: 127. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tCCD_L, "tCCD_L", HEX,
Help "Min Internal CAS-to-CAS delay for same bank group, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR_S, "tWTR_S", HEX,
Help "Min Internal write to read command delay time for different bank groups, 0: AUTO, max: 50. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EccErrInjAddress, "EccErrInjAddress", HEX,
Help "Address to match against for ECC error injection"
"Valid range: 0x0 ~ 0x1FFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EccErrInjMask, "EccErrInjMask", HEX,
Help "Mask to match against for ECC error injection"
"Valid range: 0x0 ~ 0x1FFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EccErrInjCount, "EccErrInjCount", HEX,
Help "Number of transactions between ECC error injection"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig, "Frequency Limit for 2DPC Mixed or non-POR Config", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto (default), otherwise a frequency in MT/s"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMask, "First Dimm BitMask", HEX,
Help "Defines which DIMM should be populated first on a 2DPC board. Bit0: MC0 DIMM0, Bit1: MC0 DIMM1, Bit2: MC1 DIMM0, Bit3: MC1 DIMM1. For each MC, the first DIMM to be populated should be set to '1'"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIA, "SAGV Switch Factor IA DDR BW", DEC,
Help "SAGV Switch Factor IA DDR BW: IA DDR load percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorGT, "SAGV Switch Factor GT DDR BW", DEC,
Help "SAGV Switch Factor GT DDR BW: GT DDR load percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIO, "SAGV Switch Factor IO DDR BW", DEC,
Help "SAGV Switch Factor IO DDR BW: IO DDR load percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorStall, "SAGV Switch Factor IA and GT Stall", DEC,
Help "SAGV Switch Factor IA and GT Stall: IA and GT percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsDownControl, "Threshold For Switch Down", DEC,
Help "SAGV heuristics down control: Duration in ms of low activity after which SAGV will switch down, from 1 to 50ms."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsUpControl, "Threshold For Switch Up", DEC,
Help "SAGV heuristics up control: Duration in ms of low activity after which SAGV will switch up, from 1 to 50ms."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB, "Frequency Limit for Mixed 2DPC DDR5 1 Rank 8GB and 8GB", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_16GB, "Frequency Limit for Mixed 2DPC DDR5 1 Rank 16GB and 16GB", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB_16GB, "Frequency Limit for Mixed 2DPC DDR5 1 Rank 8GB and 16GB", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_2R2R, "Frequency Limit for Mixed 2DPC DDR5 2 Rank", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCm, "DMI Hw Eq Gen3 CoeffList Cm", HEX,
Help "PCH_DMI_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCp, "DMI Hw Eq Gen3 CoeffList Cp", HEX,
Help "PCH_DMI_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LctCmdEyeWidth, " LCT Command eyewidth", DEC,
Help " LCT Command eyewidth. 0: Auto, otherwise eyewidth , default is 96"
"Valid range: 0 ~ 256"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmrLpddr, "For LPDDR Only: Throttler CKEMin Timer", HEX,
Help "For LPDDR Only: Timer value for CKEMin, range[255;0]. Reqd min of SC_ROUND_T + BYTE_LENGTH (4). Dfault is 0x00"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMaskEcc, "First ECC Dimm BitMask", HEX,
Help "Defines which ECC DIMM should be populated first on a 2DPC board. Bit0: MC0 DIMM0, Bit1: MC0 DIMM1, Bit2: MC1 DIMM0, Bit3: MC1 DIMM1. For each MC, the first DIMM to be populated should be set to '1'"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_Lp5BankMode, " LP5 Bank Mode", &gPlatformFspPkgTokenSpaceGuid_Lp5BankMode,
Help " LP5 Bank Mode. 0: Auto, 1: 8 Bank Mode, 2: 16 Bank Mode, 3: BG Mode, default is 0"
Combo $gPlatformFspPkgTokenSpaceGuid_WRDS, "Write DS Training", &EN_DIS,
Help "Enable/Disable Write DS Training"
Combo $gPlatformFspPkgTokenSpaceGuid_OverloadSAM, "SAM Overlaoding", &EN_DIS,
Help "Enable: copy the sagv frequency point. Disable: not copy."
Combo $gPlatformFspPkgTokenSpaceGuid_MrcTimeMeasure, "Time Measure", &EN_DIS,
Help "Time Measure: 0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DfeGain, " Dfe Gain", &gPlatformFspPkgTokenSpaceGuid_DfeGain,
Help " Dfe Gain. 0:0 default value, 1: 1, 2: 2, 3: 3, 9: -1, 10: -2, 11: -3"
Combo $gPlatformFspPkgTokenSpaceGuid_CsPiStartHighinEct, "CsPiStartHighinEct", &EN_DIS,
Help "Cs Pi Start with High value in Ect: 0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_UserPowerWeightsEn, "Use user provided power weights, and channel power floor values", &EN_DIS,
Help "Enables/Disable Use user provided power weights and channel power floor values"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableFGRAndPBRWA, "DisableFGRAndPBRWA", &EN_DIS,
Help "Disable FGR And PBR WA: 0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_LowerBasicMemTestSize, "LowerBasicMemTestSize", &EN_DIS,
Help "Reduce BasicMemoryTest size WA: 0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableSagvReorder, "DisableSagvReorder", &EN_DIS,
Help "Disable Sagv reorder on warm boot: 0(Default)=Disable, 1=Enable"
EndPage
Page "CPU (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode, "CPU Trace Hub Mode", &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode,
Help "Select 'Host Debugger' if Trace Hub is used with host debugger tool or 'Target Debugger' if Trace Hub is used by target debugger software or 'Disable' trace hub functionality."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size, "CPU Trace Hub Memory Region 0", &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size,
Help "CPU Trace Hub Memory Region 0, The avaliable memory size is : 0MB, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size, "CPU Trace Hub Memory Region 1", &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size,
Help "CPU Trace Hub Memory Region 1. The avaliable memory size is : 0MB, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_BistOnReset, "BIST on Reset", &EN_DIS,
Help "Enable or Disable BIST on Reset; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipStopPbet, "Skip Stop PBET Timer Enable/Disable", &EN_DIS,
Help "Skip Stop PBET Timer; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableC6Dram, "C6DRAM power gating feature", &EN_DIS,
Help "This policy indicates whether or not BIOS should allocate PRMRR memory for C6DRAM power gating feature.- 0: Don't allocate any PRMRR memory for C6DRAM power gating feature.- <b>1: Allocate PRMRR memory for C6DRAM power gating feature</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_OcSupport, "Over clocking support", &EN_DIS,
Help "Over clocking support; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_OcLock, "Over clocking Lock", &EN_DIS,
Help "Over clocking Lock Enable/Disable; 0: Disable; <b>1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreMaxOcRatio, "Maximum Core Turbo Ratio Override", HEX,
Help "Maximum core turbo ratio override allows to increase CPU core frequency beyond the fused max turbo ratio limit. <b>0: Hardware defaults.</b> Range: 0-85"
"Valid range: 0x00 ~ 0x53"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVoltageMode, "Core voltage mode", &EN_DIS,
Help "Core voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_RingMaxOcRatio, "Maximum clr turbo ratio override", HEX,
Help "Maximum clr turbo ratio override allows to increase CPU clr frequency beyond the fused max turbo ratio limit. <b>0: Hardware defaults.</b> Range: 0-85"
"Valid range: 0x00 ~ 0x53"
Combo $gPlatformFspPkgTokenSpaceGuid_HyperThreading, "Hyper Threading Enable/Disable", &EN_DIS,
Help "Enable or Disable Hyper Threading; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuRatioOverride, "Enable or Disable CPU Ratio Override", &EN_DIS,
Help "Enable or Disable CPU Ratio Override; <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuRatio, "CPU ratio value", HEX,
Help "CPU ratio value. Valid Range 0 to 63"
"Valid range: 0x00 ~ 0x3F"
Combo $gPlatformFspPkgTokenSpaceGuid_BootFrequency, "Boot frequency", &gPlatformFspPkgTokenSpaceGuid_BootFrequency,
Help "Sets the boot frequency starting from reset vector.- 0: Maximum battery performance. 1: Maximum non-turbo performance. <b>2: Turbo performance </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount, "Number of active big cores", &gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount,
Help "Number of active big cores(Depends on Number of big cores). Default 0xFF means to active all system supported big cores. <b>0xFF: Active all big cores</b>; 0: Disable all big cores; 1: 1; 2: 2; 3: 3;"
Combo $gPlatformFspPkgTokenSpaceGuid_FClkFrequency, "Processor Early Power On Configuration FCLK setting", &gPlatformFspPkgTokenSpaceGuid_FClkFrequency,
Help " <b>0: 800 MHz (ULT/ULX)</b>. <b>1: 1 GHz (DT/Halo)</b>. Not supported on ULT/ULX.- 2: 400 MHz. - 3: Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable, "Set JTAG power in C10 and deeper power states", &gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable,
Help "False: JTAG is power gated in C10 state. True: keeps the JTAG power up during C10 and deeper power states for debug purpose. <b>0: False</b>; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_VmxEnable, "Enable or Disable VMX", &EN_DIS,
Help "Enable or Disable VMX; 0: Disable; <b>1: Enable</b>."
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx2RatioOffset, "AVX2 Ratio Offset", HEX,
Help "0(Default)= No Offset. Range 0 - 31. Specifies number of bins to decrease AVX ratio vs. Core Ratio. Uses Mailbox MSR 0x150, cmd 0x1B."
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx3RatioOffset, "AVX3 Ratio Offset", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0x1F"
Combo $gPlatformFspPkgTokenSpaceGuid_BclkAdaptiveVoltage, "BCLK Adaptive Voltage Enable", &EN_DIS,
Help "When enabled, the CPU V/F curves are aware of BCLK frequency when calculated. </b>0: Disable;<b> 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVoltageOverride, "core voltage override", HEX,
Help "The core voltage override which is applied to the entire range of cpu core frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVoltageAdaptive, "Core Turbo voltage Adaptive", HEX,
Help "Extra Turbo voltage applied to the cpu core when the cpu is operating in turbo mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVoltageOffset, "Core Turbo voltage Offset", HEX,
Help "The voltage offset applied to the core while operating in turbo mode.Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_CorePllVoltageOffset, "Core PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomPllVoltageOffset, "Atom Core PLL voltage offset", HEX,
Help "Atom Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_RingDownBin, "Ring Downbin", &EN_DIS,
Help "Ring Downbin enable/disable. When enabled, CPU will ensure the ring ratio is always lower than the core ratio.0: Disable; <b>1: Enable.</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_RingVoltageMode, "Ring voltage mode", &EN_DIS,
Help "Ring voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_TjMaxOffset, "TjMax Offset", HEX,
Help "TjMax offset.Specified value here is clipped by pCode (125 - TjMax Offset) to support TjMax in the range of 62 to 115 deg Celsius. Valid Range 10 - 63"
"Valid range: 0x0A ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_FastThrottleThreshold, "FastThrottleThreshold", HEX,
Help "FastThrottleThreshold. Specified value for max allowed temperature when cores throttle. Support FastThrottleThreshold in the range of 63 to 115 deg Celsius."
"Valid range: 0x3F ~ 0x73"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVoltageOverride, "Ring voltage override", HEX,
Help "The ring voltage override which is applied to the entire range of cpu ring frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVoltageAdaptive, "Ring Turbo voltage Adaptive", HEX,
Help "Extra Turbo voltage applied to the cpu ring when the cpu is operating in turbo mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVoltageOffset, "Ring Turbo voltage Offset", HEX,
Help "The voltage offset applied to the ring while operating in turbo mode. Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
Combo $gPlatformFspPkgTokenSpaceGuid_TmeEnable, "Enable or Disable TME", &EN_DIS,
Help "Enable or Disable TME; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable, "Enable CPU CrashLog", &EN_DIS,
Help "Enable or Disable CPU CrashLog; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable, "CPU Run Control", &gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable,
Help "Enable, Disable or Do not configure CPU Run Control; 0: Disable; 1: Enable ; <b>2: No Change</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DebugInterfaceLockEnable, "CPU Run Control Lock", &EN_DIS,
Help "Lock or Unlock CPU Run Control; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageMode, "Atom L2 voltage mode", &EN_DIS,
Help "Atom L2 voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOverride, "Atom L2 Voltage Override", HEX,
Help "The atom L2 voltage override which is applied to the entire range of atom L2 frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageAdaptive, "Atom L2 Turbo voltage Adaptive", HEX,
Help "Extra Turbo voltage applied to the atom L2 when the atom L2 is operating in turbo mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOffset, "Atom L2 Turbo voltage Offset", HEX,
Help "The voltage offset applied to the atom while operating in turbo mode.Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffset, "Per-Atom-Cluster VF Offset", HEX,
Help "Array used to specifies the selected Atom Core Cluster Offset Voltage. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffsetPrefix, "Per-Atom-Cluster VF Offset Prefix", HEX,
Help "Sets the PerAtomClusterVoltageOffset value as positive or negative for the selected Core; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_IaCepEnable, "Enable IA CEP", &EN_DIS,
Help "Control for enabling/disabling IA CEP (Current Excursion Protection)). <b>1: Enable</b>; 0: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_GtCepEnable, "Enable GT CEP", &EN_DIS,
Help "Control for enabling/disabling GT CEP (Current Excursion Protection)). <b>1: Enable</b>; 0: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_DlvrBypassModeEnable, "Enable CPU DLVR bypass mode support", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount, "Number of active small cores", &gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount,
Help "Number of active small cores(Depends on Number of small cores). Default 0xFF means to active all system supported small cores. <b>0xFF: Active all small cores</b>; 0: Disable all small cores; 1: 1; 2: 2; 3: 3;"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode, "Core VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode,
Help "Selects Core Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffset, "Core VF Point Offset", HEX,
Help "Array used to specifies the Core Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix, "Core VF Point Offset Prefix", &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix,
Help "Sets the CoreVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVfPointRatio, "Core VF Point Ratio", HEX,
Help "Array for the each selected Core VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVfPointCount, "Core VF Point Count", HEX,
Help "Number of supported Core Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope, "Core VF Configuration Scope", &gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope,
Help "Alows both all-core VF curve or per-core VF curve configuration; <b>0: All-core</b>; 1: Per-core."
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffset, "Per-core VF Offset", HEX,
Help "Array used to specifies the selected Core Offset Voltage. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffsetPrefix, "Per-core VF Offset Prefix", HEX,
Help "Sets the PerCoreVoltageOffset value as positive or negative for the selected Core; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PerCoreRatioOverride, "Per Core Max Ratio override", &EN_DIS,
Help "Enable or disable Per Core PState OC supported by writing OCMB 0x1D to program new favored core ratio to each Core. <b>0: Disable</b>, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreRatio, "Per Core Current Max Ratio", HEX,
Help "Array for the Per Core Max Ratio"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomClusterRatio, "Atom Cluster Max Ratio", HEX,
Help "Array for Atom Cluster Max Ratio, 4 ATOM cores are in the same Cluster and their max core ratio will be aligned."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreRatioExtensionMode, "Core Ratio Extension Mode", &EN_DIS,
Help "Enable or disable Core Ratio above 85 Extension Mode by writing BIOS MB 0x37 to enable FULL_RANGE_MULTIPLIER_UNLOCK_EN. <b>0: Disable</b>, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PvdRatioThreshold, "Pvd Ratio Threshold", HEX,
Help "Select PVD Ratio Threshold Value from Range 1 to 40. 0 - Auto/Default."
"Valid range: 0x0 ~ 0x28"
Combo $gPlatformFspPkgTokenSpaceGuid_UnlimitedIccMax, "Support Unlimited ICCMAX", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_CrashLogGprs, "Enable CPU CrashLog GPRs dump", &gPlatformFspPkgTokenSpaceGuid_CrashLogGprs,
Help "Enable or Disable CPU CrashLog GPRs dump; <b>0: Disable</b>; 1: Enable; 2: Only disable Smm GPRs dump"
Combo $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode, "Ring VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode,
Help "Selects Ring Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffset, "Ring VF Point Offset", HEX,
Help "Array used to specifies the Ring Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetPrefix, "Ring VF Point Offset Prefix", HEX,
Help "Sets the RingVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointRatio, "Ring VF Point Ratio", HEX,
Help "Array for the each selected Ring VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointCount, "Ring VF Point Count", HEX,
Help "Number of supported Ring Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_BclkSource, "BCLK Frequency Source", &gPlatformFspPkgTokenSpaceGuid_BclkSource,
Help "Clock source of BCLK OC frequency, <b>1:CPU BCLK</b>, 2:PCH BCLK, 3:External CLK"
EditNum $gPlatformFspPkgTokenSpaceGuid_GpioOverride, "GPIO Override", HEX,
Help "Gpio Override Level - FSP will not configure any GPIOs and rely on GPIO setings before moved to FSP. Available configurations 0: Disable; 1: Level 1 - Skips GPIO configuration in PEI/FSPM/FSPT phase;2: Level 2 - Reserved for future use"
"Valid range: 0x00 ~ 0x7"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuBclkOcFrequency, "CPU BCLK OC Frequency", HEX,
Help "CPU BCLK OC Frequency in 10KHz units increasing. Value 9800 (10KHz) = 98MHz <b>0 - Auto</b>. Range is 8000-50000 (10KHz)."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DisablePerCoreMask, "Bitmask of disable cores", HEX,
Help "Core mask is a bitwise indication of which core should be disabled. <b>0x00=Default</b>; Bit 0 - core 0, bit 7 - core 7."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DisablePerAtomMask, "Bitmask of disable atoms", HEX,
Help "DEPRECATED"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride, "Sa PLL Frequency", &gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride,
Help "Configure Sa PLL Frequency. <b>0: 3200MHz </b>, 1: 1600MHz"
EndPage
Page "CPU (Post-Mem)"
EditNum $gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionBase, "MicrocodeRegionBase", HEX,
Help "Memory Base of Microcode Updates"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionSize, "MicrocodeRegionSize", HEX,
Help "Size of Microcode Updates"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TurboMode, "Turbo Mode", &EN_DIS,
Help "Enable/Disable Turbo mode. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_AesEnable, "Advanced Encryption Standard (AES) feature", &EN_DIS,
Help "Enable or Disable Advanced Encryption Standard (AES) feature; </b>0: Disable; <b>1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi3Enable, "Power State 3 enable/disable", HEX,
Help "PCODE MMIO Mailbox: Power State 3 enable/disable; 0: Disable; <b>1: Enable</b>. For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi4Enable, "Power State 4 enable/disable", HEX,
Help "PCODE MMIO Mailbox: Power State 4 enable/disable; 0: Disable; <b>1: Enable</b>.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ImonSlope, "Imon slope correction", HEX,
Help "PCODE MMIO Mailbox: Imon slope correction. Specified in 1/100 increment values. Range is 0-200. 125 = 1.25. <b>0: Auto</b>.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ImonOffset, "Imon offset correction", HEX,
Help "PCODE MMIO Mailbox: Imon offset correction. Value is a 2's complement signed integer. Units 1/1000, Range 0-63999. For an offset = 12.580, use 12580. <b>0: Auto</b>"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrConfigEnable, "Enable/Disable BIOS configuration of VR", HEX,
Help "Enable/Disable BIOS configuration of VR; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcEnable, "Thermal Design Current enable/disable", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current enable/disable; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcTimeWindow, "Thermal Design Current time window", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current time window. Defined in milli seconds. Range 1ms to 448s"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcLock, "Thermal Design Current Lock", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current Lock; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysSlope, "Platform Psys slope correction", HEX,
Help "PCODE MMIO Mailbox: Platform Psys slope correction. <b>0 - Auto</b> Specified in 1/100 increment values. Range is 0-200. 125 = 1.25"
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysOffset, "Platform Psys offset correction", HEX,
Help "PCODE MMIO Mailbox: Platform Psys offset correction. <b>0 - Auto</b> Units 1/1000, Range 0-63999. For an offset of 25.348, enter 25348."
"Valid range: 0x0000 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_AcousticNoiseMitigation, "Acoustic Noise Mitigation feature", &EN_DIS,
Help "Enable or Disable Acoustic Noise Mitigation feature. <b>0: Disabled</b>; 1: Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_FastPkgCRampDisable, "Disable Fast Slew Rate for Deep Package C States for VR domains", &EN_DIS,
Help "Disable Fast Slew Rate for Deep Package C States based on Acoustic Noise Mitigation feature enabled. <b>0: False</b>; 1: True"
Combo $gPlatformFspPkgTokenSpaceGuid_SlowSlewRate, "Slew Rate configuration for Deep Package C States for VR domains", &gPlatformFspPkgTokenSpaceGuid_SlowSlewRate,
Help "Slew Rate configuration for Deep Package C States for VR domains based on Acoustic Noise Mitigation feature enabled. ADL supports VCCIA FAST/2/4/8/16, VCCGT FAST/2/4/8 and VCCSA FAST/2 <b>0: Fast/2</b>; 1: Fast/4; 2: Fast/8; 3: Fast/16"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcCurrentLimit, "Thermal Design Current current limit", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current current limit. Specified in 1/8A units. Range is 0-4095. 1000 = 125A. <b>0: Auto</b>. For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AcLoadline, "AcLoadline", HEX,
Help "PCODE MMIO Mailbox: AcLoadline in 1/100 mOhms (ie. 1250 = 12.50 mOhm); Range is 0-6249. <b>Intel Recommended Defaults vary by domain and SKU."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DcLoadline, "DcLoadline", HEX,
Help "PCODE MMIO Mailbox: DcLoadline in 1/100 mOhms (ie. 1250 = 12.50 mOhm); Range is 0-6249.<b>Intel Recommended Defaults vary by domain and SKU.</b>"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi1Threshold, "Power State 1 Threshold current", HEX,
Help "PCODE MMIO Mailbox: Power State 1 current cuttof in 1/4 Amp increments. Range is 0-128A."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi2Threshold, "Power State 2 Threshold current", HEX,
Help "PCODE MMIO Mailbox: Power State 2 current cuttof in 1/4 Amp increments. Range is 0-128A."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi3Threshold, "Power State 3 Threshold current", HEX,
Help "PCODE MMIO Mailbox: Power State 3 current cuttof in 1/4 Amp increments. Range is 0-128A."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IccMax, "Icc Max limit", HEX,
Help "PCODE MMIO Mailbox: VR Icc Max limit. 0-512A in 1/4 A units. 400 = 100A"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TxtEnable, "Enable or Disable TXT", &EN_DIS,
Help "Enable or Disable TXT; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipMpInit, "Skip Multi-Processor Initialization", &EN_DIS,
Help "When this is skipped, boot loader must initialize processors before SilicionInit API. </b>0: Initialize; <b>1: Skip"
EditNum $gPlatformFspPkgTokenSpaceGuid_FivrRfiFrequency, "FIVR RFI Frequency", HEX,
Help "PCODE MMIO Mailbox: Set the desired RFI frequency, in increments of 100KHz. <b>0: Auto</b>. Range varies based on XTAL clock: 0-1918 (Up to 191.8HMz) for 24MHz clock; 0-1535 (Up to 153.5MHz) for 19MHz clock."
"Valid range: 0x0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FivrSpreadSpectrum, "FIVR RFI Spread Spectrum", HEX,
Help "Set the Spread Spectrum Range. <b>1.5%</b>; Range: 0.5%, 1%, 1.5%, 2%, 3%, 4%, 5%, 6%. Each Range is translated to an encoded value for FIVR register. 0.5% = 0, 1% = 3, 1.5% = 8, 2% = 18, 3% = 28, 4% = 34, 5% = 39, 6% = 44."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuBistData, "CpuBistData", HEX,
Help "Pointer CPU BIST Data"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuMpPpi, "CpuMpPpi", HEX,
Help "<b>Optional</b> pointer to the boot loader's implementation of EFI_PEI_MP_SERVICES_PPI. If not NULL, FSP will use the boot loader's implementation of multiprocessing. See section 5.1.4 of the FSP Integration Guide for more details."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PreWake, "Pre Wake Randomization time", HEX,
Help "PCODE MMIO Mailbox: Acoustic Noise Mitigation Range.Defines the maximum pre-wake randomization time in micro ticks.This can be programmed only if AcousticNoiseMitigation is enabled. Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RampUp, "Ramp Up Randomization time", HEX,
Help "PCODE MMIO Mailbox: Acoustic Noise Mitigation Range.Defines the maximum Ramp Up randomization time in micro ticks.This can be programmed only if AcousticNoiseMitigation is enabled.Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RampDown, "Ramp Down Randomization time", HEX,
Help "PCODE MMIO Mailbox: Acoustic Noise Mitigation Range.Defines the maximum Ramp Down randomization time in micro ticks.This can be programmed only if AcousticNoiseMitigation is enabled.Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrVoltageLimit, "VR Voltage Limit", HEX,
Help "PCODE MMIO Mailbox: Voltage Limit. Range is 0 - 7999mV"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInAuxImonIccImax, "VccIn Aux Imon IccMax", HEX,
Help "PCODE MMIO Mailbox: VccIn Aux Imon IccMax. <b>0 - Auto</b> Values are in 1/4 Amp increments. Range is 0-512."
"Valid range: 0x0000 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EnableVsysCritical, "Vsys Critical", HEX,
Help "PCODE MMIO Mailbox: Vsys Critical. <b>0: Disable</b>; 1: Enable Range is 0-255."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysFullScale, "Vsys Full Scale", HEX,
Help "DEPRECATED"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold, "Vsys Critical Threshold", HEX,
Help "DEPRECATED"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchMantissa, "Assertion Deglitch Mantissa", HEX,
Help "Assertion Deglitch Mantissa, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchExponent, "Assertion Deglitch Exponent", HEX,
Help "Assertion Deglitch Exponent, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchMantissa, "De assertion Deglitch Mantissa", HEX,
Help "De assertion Deglitch Mantissa, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchExponent, "De assertion Deglitch Exponent", HEX,
Help "De assertion Deglitch Exponent, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInAuxImonSlope, "VccIn Aux Imon slope correction", HEX,
Help "PCODE MMIO Mailbox: VccIn Aux Imon slope correction. <b>0 - Auto</b> Specified in 1/100 increment values. Range is 0-200. 125 = 1.25"
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInAuxImonOffset, "VccIn Aux Imon offset correction", HEX,
Help "PCODE MMIO Mailbox: VccIn Aux Imon offset correction. <b>0 - Auto</b> Units 1/1000, Range 0-63999. For an offset of 25.348, enter 25348."
"Valid range: 0x0000 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FivrSpectrumEnable, "FIVR RFI Spread Spectrum Enable or disable", HEX,
Help "Enable or Disable FIVR RFI Spread Spectrum. 0: Disable ; <b> 1: Enable </b>"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IccLimit, "VR Fast Vmode ICC Limit support", HEX,
Help "PCODE MMIO Mailbox: The non-zero value will only be effective by setting the corresponding EnableFastVmode to 1. 0-510A in 1/4 A units. 400 = 100A"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PpinSupport, "PpinSupport to view Protected Processor Inventory Number", &gPlatformFspPkgTokenSpaceGuid_PpinSupport,
Help "Enable or Disable or Auto (Based on End of Manufacturing flag. Disabled if this flag is set) for PPIN Support"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableMinVoltageOverride, "Enable or Disable Minimum Voltage Override", &EN_DIS,
Help "Enable or disable Minimum Voltage overrides ; <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_MinVoltageRuntime, "Min Voltage for Runtime ", HEX,
Help "PCODE MMIO Mailbox: Minimum voltage for runtime. Valid if EnableMinVoltageOverride = 1. Range 0 to 1999mV. <b> 0: 0mV </b>"
"Valid range: 0x00 ~ 0x7CF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MinVoltageC8, "Min Voltage for C8 ", HEX,
Help "PCODE MMIO Mailbox: Minimum voltage for C8. Valid if EnableMinVoltageOverride = 1. Range 0 to 1999mV. <b> 0: 0mV </b>"
"Valid range: 0x00 ~ 0x7CF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SmbiosType4MaxSpeedOverride, "Smbios Type4 Max Speed Override", HEX,
Help "Provide the option for platform to override the MaxSpeed field of Smbios Type 4. If this value is not zero, it dominates the field."
"Valid range: 0x0000 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Irms, "Current root mean square", HEX,
Help "PCODE MMIO Mailbox: Current root mean square; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_AvxDisable, "AvxDisable", &gPlatformFspPkgTokenSpaceGuid_AvxDisable,
Help "Enable or Disable AVX Support. This only applicable when all small core is disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_Avx3Disable, "Avx3Disable", &gPlatformFspPkgTokenSpaceGuid_Avx3Disable,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_X2ApicSupport, "X2ApicSupport", &EN_DIS,
Help "Enable or Disable X2APIC Support"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrPowerDeliveryDesign, "CPU VR Power Delivery Design", HEX,
Help "Used to communicate the power delivery design capability of the board. This value is an enum of the available power delivery segments that are defined in the Platform Design Guide."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableFastVmode, "Enable/Disable VR FastVmode. The VR will initiate reactive protection if Fast Vmode is enabled.", &gPlatformFspPkgTokenSpaceGuid_EnableFastVmode,
Help "Enable/Disable VR FastVmode; The value will only be effective by enabling the corresponding CEP.<b>0: Disable</b>; 1: Enable.For all VR by domain"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysFullScale1, "Vsys Full Scale", DEC,
Help "Vsys Full Scale, Range is 0-255000mV"
"Valid range: 0 ~ 255000"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold1, "Vsys Critical Threshold", DEC,
Help "Vsys Critical Threshold, Range is 0-255000mV "
"Valid range: 0 ~ 255000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysFullScale, "Psys Full Scale", DEC,
Help "Vsys Full Scale, Range is 0-255000mV"
"Valid range: 0 ~ 255000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysCriticalThreshold, "Psys Critical Threshold", DEC,
Help "Vsys Critical Threshold, Range is 0-255000mV "
"Valid range: 0 ~ 255000"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemProduction, "ReservedCpuPostMemProduction", &EN_DIS,
Help "Reserved for CPU Post-Mem Production"
EditNum $gPlatformFspPkgTokenSpaceGuid_BgpdtHash, "BgpdtHash[4]", HEX,
Help "BgpdtHash values"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosGuardAttr, "BiosGuardAttr", HEX,
Help "BiosGuardAttr default values"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosGuardModulePtr, "BiosGuardModulePtr", HEX,
Help "BiosGuardModulePtr default values"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableRsr, "RSR feature", &EN_DIS,
Help "Enable or Disable RSR feature; 0: Disable; <b>1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem1, "ReservedCpuPostMem1", &EN_DIS,
Help "Reserved for CPU Post-Mem 1"
Combo $gPlatformFspPkgTokenSpaceGuid_Hwp, "Enable or Disable HWP", &EN_DIS,
Help "Enable or Disable HWP(Hardware P states) Support. 0: Disable; <b>1: Enable;</b> 2-3:Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_HdcControl, "Hardware Duty Cycle Control", &EN_DIS,
Help "Hardware Duty Cycle Control configuration. 0: Disabled; <b>1: Enabled</b> 2-3:Reserved"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit1Time, "Package Long duration turbo mode time", HEX,
Help "Package Long duration turbo mode time window in seconds. Valid values(Unit in seconds) 0 to 8 , 10 , 12 ,14 , 16 , 20 , 24 , 28 , 32 , 40 , 48 , 56 , 64 , 80 , 96 , 112 , 128"
"Valid range: 0x00 ~ 0x80"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit2, "Short Duration Turbo Mode", &EN_DIS,
Help "Enable or Disable short duration Turbo Mode. </b>0 : Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_TurboPowerLimitLock, "Turbo settings Lock", &EN_DIS,
Help "Lock all Turbo settings Enable/Disable; <b>0: Disable , </b> 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3Time, "Package PL3 time window", HEX,
Help "Package PL3 time window range for this policy from 0 to 64ms"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3DutyCycle, "Package PL3 Duty Cycle", HEX,
Help "Package PL3 Duty Cycle; Valid Range is 0 to 100"
"Valid range: 0x00 ~ 0x64"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit3Lock, "Package PL3 Lock", &EN_DIS,
Help "Package PL3 Lock Enable/Disable; <b>0: Disable</b> ; 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit4Lock, "Package PL4 Lock", &EN_DIS,
Help "Package PL4 Lock Enable/Disable; <b>0: Disable</b> ; 1:Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_TccActivationOffset, "TCC Activation Offset", HEX,
Help "TCC Activation Offset. Offset from factory set TCC activation temperature at which the Thermal Control Circuit must be activated. TCC will be activated at TCC Activation Temperature, in volts.For SKL Y SKU, the recommended default for this policy is <b>10</b>, For all other SKUs the recommended default are <b>0</b>"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TccOffsetClamp, "Tcc Offset Clamp Enable/Disable", &EN_DIS,
Help "Tcc Offset Clamp for Runtime Average Temperature Limit (RATL) allows CPU to throttle below P1.For SKL Y SKU, the recommended default for this policy is <b>1: Enabled</b>, For all other SKUs the recommended default are <b>0: Disabled</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_TccOffsetLock, "Tcc Offset Lock", &EN_DIS,
Help "Tcc Offset Lock for Runtime Average Temperature Limit (RATL) to lock temperature target; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_NumberOfEntries, "Custom Ratio State Entries", HEX,
Help "The number of custom ratio state entries, ranges from 0 to 40 for a valid custom ratio table.Sets the number of custom P-states. At least 2 states must be present"
"Valid range: 0x00 ~ 0x28"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Short term Power Limit time window value for custom CTDP level 1. Valid Range 0 to 128"
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Turbo Activation Ratio for custom cTDP level 1. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp Control (0/1/2) value for custom cTDP level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Short term Power Limit time window value for custom CTDP level 2. Valid Range 0 to 128"
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Turbo Activation Ratio for custom cTDP level 2. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp Control (0/1/2) value for custom cTDP level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Short term Power Limit time window value for custom CTDP level 3. Valid Range 0 to 128"
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Turbo Activation Ratio for custom cTDP level 3. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp Control (0/1/2) value for custom cTDP level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLock, "ConfigTdp mode settings Lock", &EN_DIS,
Help "Lock the ConfigTdp mode settings from runtime changes; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigTdpBios, "Load Configurable TDP SSDT", &EN_DIS,
Help "Configure whether to load Configurable TDP SSDT; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1, "PL1 Enable value", &EN_DIS,
Help "PL1 Enable value to limit average platform power. <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Time, "PL1 timewindow", HEX,
Help "PL1 timewindow in seconds.Valid values(Unit in seconds) 0 to 8 , 10 , 12 ,14 , 16 , 20 , 24 , 28 , 32 , 40 , 48 , 56 , 64 , 80 , 96 , 112 , 128"
"Valid range: 0x00 ~ 0x80"
Combo $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2, "PL2 Enable Value", &EN_DIS,
Help "PL2 Enable activates the PL2 value to limit average platform power.<b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_MlcStreamerPrefetcher, "Enable or Disable MLC Streamer Prefetcher", &EN_DIS,
Help "Enable or Disable MLC Streamer Prefetcher; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_MlcSpatialPrefetcher, "Enable or Disable MLC Spatial Prefetcher", &EN_DIS,
Help "Enable or Disable MLC Spatial Prefetcher; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_MonitorMwaitEnable, "Enable or Disable Monitor /MWAIT instructions", &EN_DIS,
Help "Enable or Disable Monitor /MWAIT instructions; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_MachineCheckEnable, "Enable or Disable initialization of machine check registers", &EN_DIS,
Help "Enable or Disable initialization of machine check registers; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ApIdleManner, "AP Idle Manner of waiting for SIPI", &gPlatformFspPkgTokenSpaceGuid_ApIdleManner,
Help "AP Idle Manner of waiting for SIPI; 1: HALT loop; <b>2: MWAIT loop</b>; 3: RUN loop."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme, "Control on Processor Trace output scheme", &gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme,
Help "Control on Processor Trace output scheme; <b>0: Single Range Output</b>; 1: ToPA Output."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceEnable, "Enable or Disable Processor Trace feature", &EN_DIS,
Help "Enable or Disable Processor Trace feature; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_Eist, "Enable or Disable Intel SpeedStep Technology", &EN_DIS,
Help "Enable or Disable Intel SpeedStep Technology. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnergyEfficientPState, "Enable or Disable Energy Efficient P-state", &EN_DIS,
Help "Enable or Disable Energy Efficient P-state will be applied in Turbo mode. Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnergyEfficientTurbo, "Enable or Disable Energy Efficient Turbo", &EN_DIS,
Help "Enable or Disable Energy Efficient Turbo, will be applied in Turbo mode. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_TStates, "Enable or Disable T states", &EN_DIS,
Help "Enable or Disable T states; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_BiProcHot, "Enable or Disable Bi-Directional PROCHOT#", &EN_DIS,
Help "Enable or Disable Bi-Directional PROCHOT#; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableProcHotOut, "Enable or Disable PROCHOT# signal being driven externally", &EN_DIS,
Help "Enable or Disable PROCHOT# signal being driven externally; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcHotResponse, "Enable or Disable PROCHOT# Response", &EN_DIS,
Help "Enable or Disable PROCHOT# Response; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_DisableVrThermalAlert, "Enable or Disable VR Thermal Alert", &EN_DIS,
Help "Enable or Disable VR Thermal Alert; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_EnableAllThermalFunctions, "Enable or Disable Thermal Reporting", &EN_DIS,
Help "Enable or Disable Thermal Reporting through ACPI tables; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ThermalMonitor, "Enable or Disable Thermal Monitor", &EN_DIS,
Help "Enable or Disable Thermal Monitor; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_Cx, "Enable or Disable CPU power states (C-states)", &EN_DIS,
Help "Enable or Disable CPU power states (C-states). 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PmgCstCfgCtrlLock, "Configure C-State Configuration Lock", &EN_DIS,
Help "Configure C-State Configuration Lock; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_C1e, "Enable or Disable Enhanced C-states", &EN_DIS,
Help "Enable or Disable Enhanced C-states. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PkgCStateDemotion, "Enable or Disable Package Cstate Demotion", &EN_DIS,
Help "Enable or Disable Package Cstate Demotion. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PkgCStateUnDemotion, "Enable or Disable Package Cstate UnDemotion", &EN_DIS,
Help "Enable or Disable Package Cstate UnDemotion. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_CStatePreWake, "Enable or Disable CState-Pre wake", &EN_DIS,
Help "Enable or Disable CState-Pre wake. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_TimedMwait, "Enable or Disable TimedMwait Support.", &EN_DIS,
Help "Enable or Disable TimedMwait Support. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_CstCfgCtrIoMwaitRedirection, "Enable or Disable IO to MWAIT redirection", &EN_DIS,
Help "Enable or Disable IO to MWAIT redirection; <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PkgCStateLimit, "Set the Max Pkg Cstate", HEX,
Help "Set the Max Pkg Cstate. Default set to Auto which limits the Max Pkg Cstate to deep C-state. Valid values 0 - C0/C1 , 1 - C2 , 2 - C3 , 3 - C6 , 4 - C7 , 5 - C7S , 6 - C8 , 7 - C9 , 8 - C10 , 254 - CPU Default , 255 - Auto"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl0TimeUnit, "TimeUnit for C-State Latency Control0", HEX,
Help "TimeUnit for C-State Latency Control0; Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1TimeUnit, "TimeUnit for C-State Latency Control1", HEX,
Help "TimeUnit for C-State Latency Control1;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2TimeUnit, "TimeUnit for C-State Latency Control2", HEX,
Help "TimeUnit for C-State Latency Control2;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3TimeUnit, "TimeUnit for C-State Latency Control3", HEX,
Help "TimeUnit for C-State Latency Control3;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4TimeUnit, "TimeUnit for C-State Latency Control4", HEX,
Help "Time - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5TimeUnit, "TimeUnit for C-State Latency Control5", HEX,
Help "TimeUnit for C-State Latency Control5;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_PpmIrmSetting, "Interrupt Redirection Mode Select", HEX,
Help "Interrupt Redirection Mode Select.0: Fixed priority; 1: Round robin;2: Hash vector;7: No change."
"Valid range: 0x00 ~ 0x7"
Combo $gPlatformFspPkgTokenSpaceGuid_ProcHotLock, "Lock prochot configuration", &EN_DIS,
Help "Lock prochot configuration Enable/Disable; 0: Disable;<b> 1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel, "Configuration for boot TDP selection", HEX,
Help "Deprecated. Move to premem."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MaxRatio, "Max P-State Ratio", HEX,
Help "Max P-State Ratio, Valid Range 0 to 0x7F"
"Valid range: 0x00 ~ 0x7F"
EditNum $gPlatformFspPkgTokenSpaceGuid_StateRatio, "P-state ratios for custom P-state table", HEX,
Help "P-state ratios for custom P-state table. NumberOfEntries has valid range between 0 to 40. For no. of P-States supported(NumberOfEntries) , StateRatio[NumberOfEntries] are configurable. Valid Range of each entry is 0 to 0x7F"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_StateRatioMax16, "P-state ratios for max 16 version of custom P-state table", HEX,
Help "P-state ratios for max 16 version of custom P-state table. This table is used for OS versions limited to a max of 16 P-States. If the first entry of this table is 0, or if Number of Entries is 16 or less, then this table will be ignored, and up to the top 16 values of the StateRatio table will be used instead. Valid Range of each entry is 0 to 0x7F"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPmax, "Platform Power Pmax", HEX,
Help "PCODE MMIO Mailbox: Platform Power Pmax. <b>0 - Auto</b> Specified in 1/8 Watt increments. Range 0-1024 Watts. Value of 800 = 100W"
"Valid range: 0x00 ~ 0x400"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1Irtl, "Interrupt Response Time Limit of C-State LatencyContol1", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol1.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2Irtl, "Interrupt Response Time Limit of C-State LatencyContol2", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol2.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3Irtl, "Interrupt Response Time Limit of C-State LatencyContol3", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol3.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4Irtl, "Interrupt Response Time Limit of C-State LatencyContol4", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol4.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5Irtl, "Interrupt Response Time Limit of C-State LatencyContol5", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol5.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit1, "Package Long duration turbo mode power limit", HEX,
Help "Package Long duration turbo mode power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit2Power, "Package Short duration turbo mode power limit", HEX,
Help "Package Short duration turbo mode power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3, "Package PL3 power limit", HEX,
Help "Package PL3 power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit4, "Package PL4 power limit", HEX,
Help "Package PL4 power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_TccOffsetTimeWindowForRatl, "Tcc Offset Time Window for RATL", HEX,
Help "Package PL4 power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1, "Short term Power Limit value for custom cTDP level 1", HEX,
Help "Short term Power Limit value for custom cTDP level 1. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit2, "Long term Power Limit value for custom cTDP level 1", HEX,
Help "Long term Power Limit value for custom cTDP level 1. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1, "Short term Power Limit value for custom cTDP level 2", HEX,
Help "Short term Power Limit value for custom cTDP level 2. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit2, "Long term Power Limit value for custom cTDP level 2", HEX,
Help "Long term Power Limit value for custom cTDP level 2. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1, "Short term Power Limit value for custom cTDP level 3", HEX,
Help "Short term Power Limit value for custom cTDP level 3. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit2, "Long term Power Limit value for custom cTDP level 3", HEX,
Help "Long term Power Limit value for custom cTDP level 3. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Power, "Platform PL1 power", HEX,
Help "Platform PL1 power. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2Power, "Platform PL2 power", HEX,
Help "Platform PL2 power. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
Combo $gPlatformFspPkgTokenSpaceGuid_RaceToHalt, "Race To Halt", &EN_DIS,
Help "Enable/Disable Race To Halt feature. RTH will dynamically increase CPU frequency in order to enter pkg C-State faster to reduce overall power. (RTH is controlled through MSR 1FC bit 20)Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable, "Set Three Strike Counter Disable", &gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable,
Help "False (default): Three Strike counter will be incremented and True: Prevents Three Strike counter from incrementing; <b>0: False</b>; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_HwpInterruptControl, "Set HW P-State Interrupts Enabled for for MISC_PWR_MGMT", &EN_DIS,
Help "Set HW P-State Interrupts Enabled for for MISC_PWR_MGMT; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem2, "ReservedCpuPostMem2", &EN_DIS,
Help "Reserved for CPU Post-Mem 2"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableItbm, "Intel Turbo Boost Max Technology 3.0", &EN_DIS,
Help "Intel Turbo Boost Max Technology 3.0. 0: Disabled; <b>1: Enabled</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_C1StateAutoDemotion, "Enable or Disable C1 Cstate Demotion", &EN_DIS,
Help "Enable or Disable C1 Cstate Demotion. Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_C1StateUnDemotion, "Enable or Disable C1 Cstate UnDemotion", &EN_DIS,
Help "Enable or Disable C1 Cstate UnDemotion. Disable; <b>1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_MinRingRatioLimit, "Minimum Ring ratio limit override", HEX,
Help "Minimum Ring ratio limit override. <b>0: Hardware defaults.</b> Range: 0 - Max turbo ratio limit"
"Valid range: 0x00 ~ 0x53"
EditNum $gPlatformFspPkgTokenSpaceGuid_MaxRingRatioLimit, "Maximum Ring ratio limit override", HEX,
Help "Maximum Ring ratio limit override. <b>0: Hardware defaults.</b> Range: 0 - Max turbo ratio limit"
"Valid range: 0x00 ~ 0x53"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePerCorePState, "Enable or Disable Per Core P State OS control", &EN_DIS,
Help "Enable or Disable Per Core P State OS control. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoPerCorePstate, "Enable or Disable HwP Autonomous Per Core P State OS control", &EN_DIS,
Help "Enable or Disable HwP Autonomous Per Core P State OS control. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoEppGrouping, "Enable or Disable HwP Autonomous EPP Grouping", &EN_DIS,
Help "Enable or Disable HwP Autonomous EPP Grouping. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableEpbPeciOverride, "Enable or Disable EPB override over PECI", &EN_DIS,
Help "Enable or Disable EPB override over PECI. <b>0: Disable;</b> 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableFastMsrHwpReq, "Enable or Disable Fast MSR for IA32_HWP_REQUEST", &EN_DIS,
Help "Enable or Disable Fast MSR for IA32_HWP_REQUEST. 0: Disable;<b> 1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ApplyConfigTdp, "Enable Configurable TDP", &EN_DIS,
Help "Applies TDP initialization settings based on non-cTDP or cTDP.; 0: Applies to non-cTDP; <b>1: Applies to cTDP</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_HwpLock, "Misc Power Management MSR Lock", &EN_DIS,
Help "Lock Misc Power Management MSR. Enable/Disable; 0: Disable , <b> 1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DualTauBoost, "Dual Tau Boost", &EN_DIS,
Help "Enable, Disable Dual Tau Boost feature. This is only applicable for Desktop; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_StepDownMode, "Is Battery Present", &EN_DIS,
Help "BatteryPresent Enable/Disable; <b>0: Disable</b> ; 1:Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PlatformAtxTelemetryUnit, "Platform ATX Telemetry Unit", HEX,
Help "Set ATX Telemetry Unit in Watts or Percentage; <b>0: Watts</b>; 1: Percent"
"Valid range: 0x00 ~ 0x1"
Combo $gPlatformFspPkgTokenSpaceGuid_ProcHotDemotion, "ProcHot Demotion Algorithm configuration", &EN_DIS,
Help "ProcHot Demotion Algorithm configuration. Hardware Default/Disable; 0: Disable;<b> 1: Hardware Default</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_TurboConfiguration, "Turbo Configuration", &gPlatformFspPkgTokenSpaceGuid_TurboConfiguration,
Help "To change the PL2 and Tau. <b>0: Max Transient Turbo;</b> 1: 1.2 X TDP"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableHwpScalabilityTracking, "Enable or Disable HwP Scalability Tracking", &EN_DIS,
Help "Enable or Disable HwP Scalability Tracking. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemTest, "ReservedCpuPostMemTest", &EN_DIS,
Help "Reserved for CPU Post-Mem Test"
EndPage
Page "System Agent (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuCrashLogDevice, "Enable/Disable CrashLog Device 10", &EN_DIS,
Help "Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog"
Combo $gPlatformFspPkgTokenSpaceGuid_X2ApicOptOut, "State of X2APIC_OPT_OUT bit in the DMAR table", &EN_DIS,
Help "0=Disable/Clear, 1=Enable/Set"
Combo $gPlatformFspPkgTokenSpaceGuid_DmaControlGuarantee, "State of DMA_CONTROL_GUARANTEE bit in the DMAR table", &EN_DIS,
Help "0=Disable/Clear, 1=Enable/Set"
EditNum $gPlatformFspPkgTokenSpaceGuid_VtdBaseAddress, "Base addresses for VT-d function MMIO access", HEX,
Help "Base addresses for VT-d MMIO access per VT-d engine"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdDisable, "Disable VT-d", &EN_DIS,
Help "0=Enable/FALSE(VT-d enabled), 1=Disable/TRUE (VT-d disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIgdEnable, "Vtd Programming for Igd", &EN_DIS,
Help "1=Enable/TRUE (Igd VT-d Bar programming enabled), 0=Disable/FLASE (Igd VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIpuEnable, "Vtd Programming for Ipu", &EN_DIS,
Help "1=Enable/TRUE (Ipu VT-d Bar programming enabled), 0=Disable/FLASE (Ipu VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIopEnable, "Vtd Programming for Iop", &EN_DIS,
Help "1=Enable/TRUE (Iop VT-d Bar programming enabled), 0=Disable/FLASE (Iop VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdItbtEnable, "Vtd Programming for ITbt", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc, "Internal Graphics Pre-allocated Memory", &gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc,
Help "Size of memory preallocated for internal graphics."
Combo $gPlatformFspPkgTokenSpaceGuid_InternalGfx, "Internal Graphics", &EN_DIS,
Help "Enable/disable internal graphics."
Combo $gPlatformFspPkgTokenSpaceGuid_ApertureSize, "Aperture Size", &gPlatformFspPkgTokenSpaceGuid_ApertureSize,
Help "Select the Aperture Size."
EditNum $gPlatformFspPkgTokenSpaceGuid_HgDelayAfterPwrEn, "HG dGPU Power Delay", HEX,
Help "HG dGPU delay interval after power enabling: 0=Minimal, 1000=Maximum, default is 300=300 microseconds"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_HgDelayAfterHoldReset, "HG dGPU Reset Delay", HEX,
Help "HG dGPU delay interval for Reset complete: 0=Minimal, 1000=Maximum, default is 100=100 microseconds"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_MmioSizeAdjustment, "MMIO size adjustment for AUTO mode", HEX,
Help "Positive number means increasing MMIO size, Negative value means decreasing MMIO size: 0 (Default)=no change to AUTO mode MMIO size"
"Valid range: 0 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom, "PCIe ASPM programming will happen in relation to the Oprom", &gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom,
Help "Select when PCIe ASPM programming will happen in relation to the Oprom. Before(0x0)(Default): Do PCIe ASPM programming before Oprom, After(0x1): Do PCIe ASPM programming after Oprom, requires an SMI handler to save/restore ASPM settings during S3 resume"
Combo $gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay, "Selection of the primary display device", &gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay,
Help "0=iGFX, 1=PEG, 2=PCIe Graphics on PCH, 3(Default)=AUTO, 4=Hybrid Graphics"
Combo $gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize, "Selection of PSMI Region size", &gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize,
Help "0=32MB, 1=288MB, 2=544MB, 3=800MB, 4=1024MB Default is 0"
Combo $gPlatformFspPkgTokenSpaceGuid_GrantCount, "Enable Program PSF0 Grant Count Reload value", &EN_DIS,
Help "Enable/disable Program PSF0 Grant Count Reload value"
EditNum $gPlatformFspPkgTokenSpaceGuid_GmAdr, "Temporary MMIO address for GMADR", HEX,
Help "Obsolete field now and it has been extended to 64 bit address, used GmAdr64 "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GttMmAdr, "Temporary MMIO address for GTTMMADR", HEX,
Help "The reference code will use this as Temporary MMIO address space to access GTTMMADR Registers.Platform should provide conflict free Temporary MMIO Range: GttMmAdr to (GttMmAdr + 2MB MMIO + 6MB Reserved + GttSize). Default is (GmAdr - (2MB MMIO + 6MB Reserved + GttSize)) to (GmAdr - 0x1) (Where GttSize = 8MB)"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_GttSize, "Selection of iGFX GTT Memory size", &gPlatformFspPkgTokenSpaceGuid_GttSize,
Help "1=2MB, 2=4MB, 3=8MB, Default is 3"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie0Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 0", HEX,
Help "Hybrid Graphics GPIO information for PEG 0, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaOcSupport, "Enable/Disable SA OcSupport", &EN_DIS,
Help "Enable: Enable SA OcSupport, Disable(Default): Disable SA OcSupport"
Combo $gPlatformFspPkgTokenSpaceGuid_GtVoltageMode, "GT slice Voltage Mode", &gPlatformFspPkgTokenSpaceGuid_GtVoltageMode,
Help "0(Default): Adaptive, 1: Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtMaxOcRatio, "Maximum GTs turbo ratio override", HEX,
Help "0(Default)=Minimal/Auto, 60=Maximum"
"Valid range: 0x00 ~ 0x3C"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVoltageOffset, "The voltage offset applied to GT slice", HEX,
Help "0(Default)=Minimal, 1000=Maximum"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVoltageOverride, "The GT slice voltage override which is applied to the entire range of GT frequencies", HEX,
Help "0(Default)=Minimal, 2000=Maximum"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtExtraTurboVoltage, "adaptive voltage applied during turbo frequencies", HEX,
Help "0(Default)=Minimal, 2000=Maximum"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaVoltageOffset, "voltage offset applied to the SA", HEX,
Help "0(Default)=Minimal, 1000=Maximum"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_RootPortIndex, "PCIe root port Function number for Hybrid Graphics dGPU", HEX,
Help "Root port Index number to indicate which PCIe root port has dGPU"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaIpuEnable, "Enable/Disable SA IPU", &EN_DIS,
Help "Enable(Default): Enable SA IPU, Disable: Disable SA IPU"
Combo $gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed, "Lane Used of CSI port", &gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed,
Help " Lane Used of each CSI port"
Combo $gPlatformFspPkgTokenSpaceGuid_CsiSpeed, "Lane Used of CSI port", &gPlatformFspPkgTokenSpaceGuid_CsiSpeed,
Help " Speed of each CSI port"
Combo $gPlatformFspPkgTokenSpaceGuid_ImguClkOutEn, "IMGU CLKOUT Configuration", &EN_DIS,
Help "The configuration of IMGU CLKOUT, 0: Disable;<b>1: Enable</b>."
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableMask, "Enable PCIE RP Mask", HEX,
Help "Enable/disable PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios, "Assertion on Link Down GPIOs", &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios,
Help "GPIO Assertion on Link Down. Disabled(0x0)(Default): Disable assertion on Link Down GPIOs, Enabled(0x1): Enable assertion on Link Down GPIOs"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable, "Enable ClockReq Messaging ", &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable,
Help "ClockReq Messaging. Disabled(0x0): Disable ClockReq Messaging, Enabled(0x1)(Default): Enable ClockReq Messaging"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPcieSpeed, "PCIE RP Pcie Speed", HEX,
Help "Determines each PCIE Port speed capability. 0: Auto; 1: Gen1; 2: Gen2; 3: Gen3; 4: Gen4 (see: CPU_PCIE_SPEED)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_GtPsmiSupport, "Selection of PSMI Support On/Off", &EN_DIS,
Help "0(Default) = FALSE, 1 = TRUE. When TRUE, it will allow the PSMI Support"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig, "Program GPIOs for LFP on DDI port-A device", &gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig,
Help "0=Disabled,1(Default)=eDP, 2=MIPI DSI"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig, "Program GPIOs for LFP on DDI port-B device", &gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig,
Help "0(Default)=Disabled,1=eDP, 2=MIPI DSI"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortAHpd, "Enable or disable HPD of DDI port A", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBHpd, "Enable or disable HPD of DDI port B", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortCHpd, "Enable or disable HPD of DDI port C", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort1Hpd, "Enable or disable HPD of DDI port 1", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort2Hpd, "Enable or disable HPD of DDI port 2", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort3Hpd, "Enable or disable HPD of DDI port 3", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort4Hpd, "Enable or disable HPD of DDI port 4", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortADdc, "Enable or disable DDC of DDI port A", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBDdc, "Enable or disable DDC of DDI port B", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortCDdc, "Enable or disable DDC of DDI port C", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort1Ddc, "Enable DDC setting of DDI Port 1", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort2Ddc, "Enable DDC setting of DDI Port 2", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort3Ddc, "Enable DDC setting of DDI Port 3", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort4Ddc, "Enable DDC setting of DDI Port 4", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_GmAdr64, "Temporary MMIO address for GMADR", HEX,
Help "The reference code will use this as Temporary MMIO address space to access GMADR Registers.Platform should provide conflict free Temporary MMIO Range: GmAdr to (GmAdr + ApertureSize). Default is (PciExpressBaseAddress - ApertureSize) to (PciExpressBaseAddress - 0x1) (Where ApertureSize = 256MB, 512MB, 1024MB and 2048MB)"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreHtDisable, "Per-core HT Disable", HEX,
Help "Defines the per-core HT disable mask where: 1 - Disable selected logical core HT, 0 - is ignored. Input is in HEX and each bit maps to a logical core. Ex. A value of '1F' would disable HT for cores 4,3,2,1 and 0. Default is 0, all cores have HT enabled. Range is 0 - 0x7F for max 8 cores. You can only disable up to MAX_CORE_COUNT - 1."
"Valid range: 0x00 ~ 0x7F"
Combo $gPlatformFspPkgTokenSpaceGuid_SaVoltageMode, "SA/Uncore voltage mode", &EN_DIS,
Help "SA/Uncore voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_SaVoltageOverride, "SA/Uncore Voltage Override", HEX,
Help "The SA/Uncore voltage override applicable when SA/Uncore voltage mode is in Override mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaExtraTurboVoltage, "SA/Uncore Extra Turbo voltage", HEX,
Help "Extra Turbo voltage applicable when SA/Uncore voltage mode is in Adaptive mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
Combo $gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping, "Thermal Velocity Boost Ratio clipping", &gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping,
Help "0(Default): Disabled, 1: Enabled. This service controls Core frequency reduction caused by high package temperatures for processors that implement the Intel Thermal Velocity Boost (TVB) feature"
Combo $gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization, "Thermal Velocity Boost voltage optimization", &gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization,
Help "0: Disabled, 1: Enabled(Default). This service controls thermal based voltage optimizations for processors that implement the Intel Thermal Velocity Boost (TVB) feature."
Combo $gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink, "Enable/Disable Display Audio Link in Pre-OS", &gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink,
Help "0(Default)= Disable, 1 = Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtPllVoltageOffset, "GT PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingPllVoltageOffset, "Ring PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPllVoltageOffset, "System Agent PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_McPllVoltageOffset, "Memory Controller PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_CridEnable, "Enable/Disable SA CRID", &EN_DIS,
Help "Enable: SA CRID, Disable (Default): SA CRID"
Combo $gPlatformFspPkgTokenSpaceGuid_WrcFeatureEnable, "WRC Feature", &EN_DIS,
Help "Enable/Disable WRC (Write Cache) feature of IOP. When feature is enabled, supports IO devices allocating onto the ring and into LLC. WRC is fused on by default."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieImrSize, "Size of PCIe IMR.", HEX,
Help "Size of PCIe IMR in megabytes"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieImrEnabled, "Enable PCIe IMR", &EN_DIS,
Help "0: Disable(AUTO), 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieImrRpLocation, "Enable PCIe IMR", &EN_DIS,
Help "1: PCH PCIE, 2: SA PCIE. If PCIeImrEnabled is TRUE then this will use to select the Root port location from PCH PCIe or SA PCIe"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieImrRpSelection, "Root port number for IMR.", HEX,
Help "Root port number for IMR.If PCieImrRpLocation is PCH PCIe then select root port from 0 to 23 and if it is SA PCIe then select root port from 0 to 3"
"Valid range: 0x00 ~ 0x17"
Combo $gPlatformFspPkgTokenSpaceGuid_SkipExtGfxScan, "Skip external display device scanning", &EN_DIS,
Help "Enable: Do not scan for external display device, Disable (Default): Scan external display devices"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmaBufferSize, "PMR Size", HEX,
Help "Size of PMR memory buffer. 0x400000 for normal boot and 0x200000 for S3 boot"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PreBootDmaMask, "VT-d/IOMMU Boot Policy", HEX,
Help "BIT0: Enable IOMMU during boot, BIT1: Enable IOMMU when transfer control to OS"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay, "Delta T12 Power Cycle Delay required in ms", &gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay,
Help "Select the value for delay required. 0= No delay, 0xFFFF(Default) = Auto calculate T12 Delay to max 500ms"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie1Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 1", HEX,
Help "Hybrid Graphics GPIO information for PEG 1, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie2Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 2", HEX,
Help "Hybrid Graphics GPIO information for PEG 2, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie3Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 3", HEX,
Help "Hybrid Graphics GPIO information for PEG 3, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx2VoltageScaleFactor, "Avx2 Voltage Guardband Scaling Factor", HEX,
Help "AVX2 Voltage Guardband Scale factor applied to AVX2 workloads. Range is 0-200 in 1/100 units, where a value of 125 would apply a 1.25 scale factor."
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx512VoltageScaleFactor, "Avx512 Voltage Guardband Scaling Factor", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0xC8"
EndPage
Page "System Agent (Post-Mem)"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPtr, "Logo Pointer", HEX,
Help "Points to PEI Display Logo Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoSize, "Logo Size", HEX,
Help "Size of PEI Display Logo Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BltBufferAddress, "Blt Buffer Address", HEX,
Help "Address of Blt buffer"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BltBufferSize, "Blt Buffer Size", HEX,
Help "Size of Blt Buffer, is equal to PixelWidth * PixelHeight * 4 bytes (the size of EFI_GRAPHICS_OUTPUT_BLT_PIXEL)"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GraphicsConfigPtr, "Graphics Configuration Ptr", HEX,
Help "Points to VBT"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Device4Enable, "Enable Device 4", &EN_DIS,
Help "Enable/disable Device 4"
Combo $gPlatformFspPkgTokenSpaceGuid_PavpEnable, "Enable/Disable PavpEnable", &EN_DIS,
Help "Enable(Default): Enable PavpEnable, Disable: Disable PavpEnable"
Combo $gPlatformFspPkgTokenSpaceGuid_CdClock, "CdClock Frequency selection", &gPlatformFspPkgTokenSpaceGuid_CdClock,
Help "0 (Default) Auto (Max based on reference clock frequency), 0: 192, 1: 307.2, 2: 312 Mhz, 3: 324Mhz, 4: 326.4 Mhz, 5: 552 Mhz, 6: 556.8 Mhz, 7: 648 Mhz, 8: 652.8 Mhz"
Combo $gPlatformFspPkgTokenSpaceGuid_PeiGraphicsPeimInit, "Enable/Disable PeiGraphicsPeimInit", &EN_DIS,
Help "<b>Enable(Default):</b> FSP will initialize the framebuffer and provide it via EFI_PEI_GRAPHICS_INFO_HOB. Disable: FSP will NOT initialize the framebuffer."
Combo $gPlatformFspPkgTokenSpaceGuid_GnaEnable, "Enable or disable GNA device", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SkipFspGop, "Enable/Disable SkipFspGop", &EN_DIS,
Help "Enable: Skip FSP provided GOP driver, Disable(Default): Use FSP provided GOP driver"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPostMemRsvd, "SaPostMemRsvd", &EN_DIS,
Help "Reserved for PCH Post-Mem"
EditNum $gPlatformFspPkgTokenSpaceGuid_SendEcCmd, "SendEcCmd", HEX,
Help "SendEcCmd function pointer. \n @code typedef EFI_STATUS (EFIAPI *PLATFORM_SEND_EC_COMMAND) (IN EC_COMMAND_TYPE EcCmdType, IN UINT8 EcCmd, IN UINT8 SendData, IN OUT UINT8 *ReceiveData); @endcode"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcCmdProvisionEav, "EcCmdProvisionEav", HEX,
Help "Ephemeral Authorization Value default values. Provisions an ephemeral shared secret to the EC"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcCmdLock, "EcCmdLock", HEX,
Help "EcCmdLock default values. Locks Ephemeral Authorization Value sent previously"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SiSkipSsidProgramming, "Skip Ssid Programming.", &EN_DIS,
Help "When set to TRUE, silicon code will not do any SSID programming and platform code needs to handle that by itself properly."
EditNum $gPlatformFspPkgTokenSpaceGuid_SiCustomizedSvid, "Change Default SVID", HEX,
Help "Change the default SVID used in FSP to programming internal devices. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiCustomizedSsid, "Change Default SSID", HEX,
Help "Change the default SSID used in FSP to programming internal devices. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiSsidTablePtr, "SVID SDID table Poniter.", HEX,
Help "The address of the table of SVID SDID to customize each SVID SDID entry. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiNumberOfSsidTableEntry, "Number of ssid table.", HEX,
Help "SiNumberOfSsidTableEntry should match the table entries created in SiSsidTablePtr. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortResetMessageEnable, "USB2 Port Reset Message Enable", HEX,
Help "0: Disable USB2 Port Reset Message; 1: Enable USB2 Port Reset Message; This must be enable for USB2 Port those are paired with CPU XHCI Port"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt, "SATA RST Interrupt Mode", &gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt,
Help "Allowes to choose which interrupts will be implemented by SATA controller in RAID mode."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipPamLock, "Skip PAM regsiter lock", &EN_DIS,
Help "Enable: PAM register will not be locked by RC, platform code should lock it, Disable(Default): PAM registers will be locked by RC"
Combo $gPlatformFspPkgTokenSpaceGuid_EdramTestMode, "EDRAM Test Mode", &gPlatformFspPkgTokenSpaceGuid_EdramTestMode,
Help "Enable: PAM register will not be locked by RC, platform code should lock it, Disable(Default): PAM registers will be locked by RC"
Combo $gPlatformFspPkgTokenSpaceGuid_RenderStandby, "Enable/Disable IGFX RenderStandby", &EN_DIS,
Help "Enable(Default): Enable IGFX RenderStandby, Disable: Disable IGFX RenderStandby"
Combo $gPlatformFspPkgTokenSpaceGuid_PmSupport, "Enable/Disable IGFX PmSupport", &EN_DIS,
Help "Enable(Default): Enable IGFX PmSupport, Disable: Disable IGFX PmSupport"
Combo $gPlatformFspPkgTokenSpaceGuid_CdynmaxClampEnable, "Enable/Disable CdynmaxClamp", &EN_DIS,
Help "Enable: Enable CdynmaxClamp, Disable(Default): Disable CdynmaxClamp"
Combo $gPlatformFspPkgTokenSpaceGuid_GtFreqMax, "GT Frequency Limit", &gPlatformFspPkgTokenSpaceGuid_GtFreqMax,
Help "0xFF: Auto(Default), 2: 100 Mhz, 3: 150 Mhz, 4: 200 Mhz, 5: 250 Mhz, 6: 300 Mhz, 7: 350 Mhz, 8: 400 Mhz, 9: 450 Mhz, 0xA: 500 Mhz, 0xB: 550 Mhz, 0xC: 600 Mhz, 0xD: 650 Mhz, 0xE: 700 Mhz, 0xF: 750 Mhz, 0x10: 800 Mhz, 0x11: 850 Mhz, 0x12:900 Mhz, 0x13: 950 Mhz, 0x14: 1000 Mhz, 0x15: 1050 Mhz, 0x16: 1100 Mhz, 0x17: 1150 Mhz, 0x18: 1200 Mhz"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableTurboGt, "Disable Turbo GT", &EN_DIS,
Help " 0=Disable: GT frequency is not limited, 1=Enable: Disables Turbo GT frequency"
Combo $gPlatformFspPkgTokenSpaceGuid_SkipCdClockInit, "Enable/Disable CdClock Init", &EN_DIS,
Help "Enable: Skip Full CD clock initializaton, Disable(Default): Initialize the full CD clock if not initialized by Gfx PEIM"
Combo $gPlatformFspPkgTokenSpaceGuid_RC1pFreqEnable, "Enable RC1p frequency request to PMA (provided all other conditions are met)", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnMultiVcEnable, "Enable TSN Multi-VC", &EN_DIS,
Help "Enable/disable Multi Virtual Channels(VC) in TSN."
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPixelHeight, "LogoPixelHeight Address", HEX,
Help "Address of LogoPixelHeight"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPixelWidth, "LogoPixelWidth Address", HEX,
Help "Address of LogoPixelWidth"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb4CmMode, "ITbt Usb4CmMode value", HEX,
Help "ITbt Usb4CmMode value. 0:Firmware CM, 1:Software CM"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieResizableBarSupport, "PCIE Resizable BAR Support", &EN_DIS,
Help "Enable/Disable PCIE Resizable BAR Support.0: Disable; 1: Enable; 2: Auto(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_SaPostMemTestRsvd, "SaPostMemTestRsvd", &EN_DIS,
Help "Reserved for SA Post-Mem Test"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxSnoopLatency, "PCIE RP Ltr Max Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxNoSnoopLatency, "PCIE RP Ltr Max No Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Non-Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMode, "PCIE RP Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMultiplier, "PCIE RP Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideValue, "PCIE RP Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMode, "PCIE RP Non Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMultiplier, "PCIE RP Non Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideValue, "PCIE RP Non Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Uptp, "PCIE RP Upstream Port Transmiter Preset", HEX,
Help "Used during Gen3 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Dptp, "PCIE RP Downstream Port Transmiter Preset", HEX,
Help "Used during Gen3 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Uptp, "PCIE RP Upstream Port Transmiter Preset", HEX,
Help "Used during Gen4 Link Equalization. Used for all lanes. Default is 8."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Dptp, "PCIE RP Downstream Port Transmiter Preset", HEX,
Help "Used during Gen4 Link Equalization. Used for all lanes. Default is 9."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Uptp, "PCIE RP Upstream Port Transmiter Preset", HEX,
Help "Used during Gen5 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Dptp, "PCIE RP Downstream Port Transmiter Preset", HEX,
Help "Used during Gen5 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp, "FOMS Control Policy", &gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp,
Help "Choose the Foms Control Policy, <b>Default = 0 </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcC10DynamicThresholdAdjustment, "PMC C10 dynamic threshold dajustment enable", &EN_DIS,
Help "Set if you want to enable PMC C10 dynamic threshold adjustment. Only works on supported SKUs"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode, "P2P mode for PCIE RP", &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode,
Help "Enable/disable peer to peer mode for PCIE Root Ports. 0: Disable, 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitRatio, "Turbo Ratio Limit Ratio array", HEX,
Help "TurboRatioLimitRatio[7-0] will pair with TurboRatioLimitNumCore[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitNumCore, "Turbo Ratio Limit Num Core array", HEX,
Help "TurboRatioLimitNumCore[7-0] will pair with TurboRatioLimitRatio[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitRatio, "ATOM Turbo Ratio Limit Ratio array", HEX,
Help "AtomTurboRatioLimitRatio[7-0] will pair with AtomTurboRatioLimitNumCore[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitNumCore, "ATOM Turbo Ratio Limit Num Core array", HEX,
Help "AtomTurboRatioLimitNumCore[7-0] will pair with AtomTurboRatioLimitRatio[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FspEventHandler, "FspEventHandler", HEX,
Help "<b>Optional</b> pointer to the boot loader's implementation of FSP_EVENT_HANDLER."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdGlobalMapping, "Enable VMD Global Mapping", &EN_DIS,
Help "Enable/disable to VMD controller.0: Disable; 1: Enable(Default)"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieFunc0LinkDisable, "CPU PCIE Port0 Link Disable", &EN_DIS,
Help "CPU PCIE Port0 Link Disable while Device attached into Port0 and Port1.0: Disable(Default); 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcSkipVccInConfig, "Skip VccIn Configuration", &EN_DIS,
Help "Skips VccIn configuration when enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_CseDataResilience, "CSE Data Resilience Support", &EN_DIS,
Help "0: Disable CSE Data Resilience Support. <b>; 1: Enable CSE Data Resilience Support.</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_HorizontalResolution, "HorizontalResolution for PEI Logo", HEX,
Help "HorizontalResolution from PEIm Gfx for PEI Logo"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VerticalResolution, "VerticalResolution for PEI Logo", HEX,
Help "VerticalResolution from PEIm Gfx for PEI Logo"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcActiveLtr, "Touch Host Controller Active Ltr", HEX,
Help "Expose Active Ltr for OS driver to set"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcIdleLtr, "Touch Host Controller Idle Ltr", HEX,
Help "Expose Idle Ltr for OS driver to set"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidResetPad, "Touch Host Controller Hid Over Spi ResetPad", HEX,
Help "Hid Over Spi ResetPad 0x0 - Use THC HW default Pad, For other pad setting refer to GpioPins"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidResetPadTrigger, "Touch Host Controller Hid Over Spi ResetPad Trigger", HEX,
Help "Hid Over Spi Reset Pad Trigger 0x0:Low, 0x1:High"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidConnectionSpeed, "Touch Host Controller Hid Over Spi Connection Speed", HEX,
Help "Hid Over Spi Connection Speed - SPI Frequency"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcLimitPacketSize, "Touch Host Controller Hid Over Spi Limit PacketSize", HEX,
Help "When set, limits SPI read & write packet size to 64B. Otherwise, THC uses Max Soc packet size for SPI Read and Write 0x0- Max Soc Packet Size, 0x11 - 64 Bytes"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPerformanceLimitation, "Touch Host Controller Hid Over Spi Limit PacketSize", HEX,
Help "Minimum amount of delay the THC/QUICKSPI driver must wait between end of write operation and begin of read operation. This value shall be in 10us multiples 0x0: Disabled, 1-65535 (0xFFFF) - up to 655350 us"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportHeaderAddress, "Touch Host Controller Hid Over Spi Input Report Header Address", HEX,
Help "Hid Over Spi Input Report Header Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportBodyAddress, "Touch Host Controller Hid Over Spi Input Report Body Address", HEX,
Help "Hid Over Spi Input Report Body Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidOutputReportAddress, "Touch Host Controller Hid Over Spi Output Report Address", HEX,
Help "Hid Over Spi Output Report Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidReadOpcode, "Touch Host Controller Hid Over Spi Read Opcode", HEX,
Help "Hid Over Spi Read Opcode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidWriteOpcode, "Touch Host Controller Hid Over Spi Write Opcode", HEX,
Help "Hid Over Spi Write Opcode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidFlags, "Touch Host Controller Hid Over Spi Flags", HEX,
Help "Hid Over Spi Flags 0x0:Single SPI Mode, 0x4000:Dual SPI Mode, 0x8000:Quad SPI Mode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemoryBuffer, "MemoryBuffer", HEX,
Help "MemoryBuffer address"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySize, "MemorySize", HEX,
Help "MemorySize value"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EndPage
Page "PCH (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusEnable, "Enable SMBus", &EN_DIS,
Help "Enable/disable SMBus controller."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode, "PCH Trace Hub Mode", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode,
Help "Select 'Host Debugger' if Trace Hub is used with host debugger tool or 'Target Debugger' if Trace Hub is used by target debugger software or 'Disable' trace hub functionality."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size, "PCH Trace Hub Memory Region 0 buffer Size", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size,
Help "Specify size of Pch trace memory region 0 buffer, the size can be 0, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size, "PCH Trace Hub Memory Region 1 buffer Size", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size,
Help "Specify size of Pch trace memory region 1 buffer, the size can be 0, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect, "HD Audio DMIC Link Clock Select", &gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect,
Help "Determines DMIC<N> Clock Source. 0: Both, 1: ClkA, 2: ClkB"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableDynamicTccoldHandshake, "Disable Tccold Handshake", &EN_DIS,
Help "Disable Tccold Handshake. <b>0: Do Nothing;</b> 1: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPreMemRsvd, "PchPreMemRsvd", &EN_DIS,
Help "Reserved for PCH Pre-Mem Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaEnable, "Enable Intel HD Audio (Azalia)", &EN_DIS,
Help "0: Disable, 1: Enable (Default) Azalia controller"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIshEnable, "Enable PCH ISH Controller", &EN_DIS,
Help "0: Disable, 1: Enable (Default) ISH Controller"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtleEnable, "Enable PCH HSIO PCIE Rx Set Ctle", HEX,
Help "Enable PCH PCIe Gen 3 Set CTLE Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtle, "PCH HSIO PCIE Rx Set Ctle Value", HEX,
Help "PCH PCIe Gen 3 Set CTLE Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmpEnable, "Enble PCH HSIO PCIE TX Gen 1 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmp, "PCH HSIO PCIE Gen 2 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmpEnable, "Enable PCH HSIO PCIE TX Gen 2 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmp, "PCH HSIO PCIE Gen 2 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmpEnable, "Enable PCH HSIO PCIE TX Gen 3 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmp, "PCH HSIO PCIE Gen 3 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 3 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmphEnable, "Enable PCH HSIO PCIE Gen 1 TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmph, "PCH HSIO PCIE Gen 1 TX Output De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 1 TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5Enable, "Enable PCH HSIO PCIE Gen 2 TX Output -3.5dB De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5, "PCH HSIO PCIE Gen 2 TX Output -3.5dB De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output -3.5dB De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0Enable, "Enable PCH HSIO PCIE Gen 2 TX Output -6.0dB De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0, "PCH HSIO PCIE Gen 2 TX Output -6.0dB De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output -6.0dB De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMag, "PCH HSIO SATA 1.5 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 1.5 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMag, "PCH HSIO SATA 3.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 3.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMag, "PCH HSIO SATA 6.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 6.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmpEnable, "Enable PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmp, "PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmpEnable, "Enable PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmp, "PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmpEnable, "Enable PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmp, "PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmphEnable, "Enable PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmph, "PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmphEnable, "Enable PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmph, "PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmphEnable, "Enable PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmph, "PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusArpEnable, "Enable SMBus ARP support", &EN_DIS,
Help "Enable SMBus ARP support."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchNumRsvdSmbusAddresses, "Number of RsvdSmbusAddressTable.", HEX,
Help "The number of elements in the RsvdSmbusAddressTable."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSmbusIoBase, "SMBUS Base Address", HEX,
Help "SMBUS Base Address (IO space)."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchSmbAlertEnable, "Enable SMBus Alert Pin", &EN_DIS,
Help "Enable SMBus Alert Pin."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkSrcUsage, "Usage type for ClkSrc", HEX,
Help "0-23: PCH rootport, 0x40-0x43: PEG port, 0x70:LAN, 0x80: unspecified but in use (free running), 0xFF: not used"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkSrcClkReq, "ClkReq-to-ClkSrc mapping", HEX,
Help "Number of ClkReq signal assigned to ClkSrc"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkReqGpioMux, "Clk Req GPIO Pin", HEX,
Help "Select Clk Req Pin. Refer to GPIO_*_MUXING_SRC_CLKREQ_x* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RsvdSmbusAddressTablePtr, "Point of RsvdSmbusAddressTable", HEX,
Help "Array of addresses reserved for non-ARP-capable SMBus devices."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpEnableMask, "Enable PCIE RP Mask", HEX,
Help "Enable/disable PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaVcType, "VC Type", &gPlatformFspPkgTokenSpaceGuid_PchHdaVcType,
Help "Virtual Channel Type Select: 0: VC0, 1: VC1."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaDspUaaCompliance, "Universal Audio Architecture compliance for DSP enabled system", &EN_DIS,
Help "0: Not-UAA Compliant (Intel SST driver supported only), 1: UAA Compliant (HDA Inbox driver or SST driver supported)."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkHdaEnable, "Enable HD Audio Link", &EN_DIS,
Help "Enable/disable HD Audio Link. Muxed with SSP0/SSP1/SNDW1."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaSdiEnable, "Enable HDA SDI lanes", HEX,
Help "Enable/disable HDA SDI lanes."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating, "HDA Power/Clock Gating (PGD/CGD)", &gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating,
Help "Enable/Disable HD Audio Power and Clock Gating(POR: Enable). 0: PLATFORM_POR, 1: FORCE_ENABLE, 2: FORCE_DISABLE."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicEnable, "Enable HD Audio DMIC_N Link", HEX,
Help "Enable/disable HD Audio DMIC1 link. Muxed with SNDW3."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkAPinMux, "DMIC<N> ClkA Pin Muxing (N - DMIC number)", HEX,
Help "Determines DMIC<N> ClkA Pin muxing. See GPIO_*_MUXING_DMIC<N>_CLKA_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkBPinMux, "DMIC<N> ClkB Pin Muxing", HEX,
Help "Determines DMIC<N> ClkA Pin muxing. See GPIO_*_MUXING_DMIC<N>_CLKB_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaDspEnable, "Enable HD Audio DSP", &EN_DIS,
Help "Enable/disable HD Audio DSP feature."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicDataPinMux, "DMIC<N> Data Pin Muxing", HEX,
Help "Determines DMIC<N> Data Pin muxing. See GPIO_*_MUXING_DMIC<N>_DATA_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSspEnable, "Enable HD Audio SSP0 Link", HEX,
Help "Enable/disable HD Audio SSP_N/I2S link. Muxed with HDA. N-number 0-5"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSndwEnable, "Enable HD Audio SoundWire#N Link", HEX,
Help "Enable/disable HD Audio SNDW#N link. Muxed with HDA."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency, "iDisp-Link Frequency", &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency,
Help "iDisp-Link Freq (PCH_HDAUDIO_LINK_FREQUENCY enum): 4: 96MHz, 3: 48MHz."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode, "iDisp-Link T-mode", &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode,
Help "iDisp-Link T-Mode (PCH_HDAUDIO_IDISP_TMODE enum): 0: 2T, 2: 4T, 3: 8T, 4: 16T"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispCodecDisconnect, "iDisplay Audio Codec disconnection", &EN_DIS,
Help "0: Not disconnected, enumerable, 1: Disconnected SDI, not enumerable."
Combo $gPlatformFspPkgTokenSpaceGuid_CnviDdrRfim, "CNVi DDR RFI Mitigation", &EN_DIS,
Help "Enable/Disable DDR RFI Mitigation. Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase, "ISA Serial Base selection", &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase,
Help "Select ISA Serial Base address. Default is 0x3F8."
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusDynamicPowerGating, "Smbus dynamic power gating", &EN_DIS,
Help "Disable or Enable Smbus dynamic power gating."
Combo $gPlatformFspPkgTokenSpaceGuid_WdtDisableAndLock, "Disable and Lock Watch Dog Register", &EN_DIS,
Help "Set 1 to clear WDT status, then disable and lock WDT registers."
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusSpdWriteDisable, "SMBUS SPD Write Disable", &EN_DIS,
Help "Set/Clear Smbus SPD Write Disable. 0: leave SPD Write Disable bit; 1: set SPD Write Disable bit. For security recommendations, SPD write disable bit must be set."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode, "Serial Io Uart Debug Mode", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode,
Help "Select SerialIo Uart Controller mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRxPinMux, "SerialIoUartDebugRxPinMux - FSPT", HEX,
Help "Select RX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugTxPinMux, "SerialIoUartDebugTxPinMux - FSPM", HEX,
Help "Select TX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRtsPinMux, "SerialIoUartDebugRtsPinMux - FSPM", HEX,
Help "Select SerialIo Uart used for debug Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugCtsPinMux, "SerialIoUartDebugCtsPinMux - FSPM", HEX,
Help "Select SerialIo Uart used for debug Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PprEnable, "Ppr Enable Type", &gPlatformFspPkgTokenSpaceGuid_PprEnable,
Help "Enable Soft or Hard PPR 0:Disable, 1:Soft PPR, <b>2:Hard PPR</b>, 3:No Repair"
EndPage
Page "PCH (Post-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_ShowSpiController, "Show SPI controller", &EN_DIS,
Help "Enable/disable to show SPI controller."
Combo $gPlatformFspPkgTokenSpaceGuid_SataSalpSupport, "Enable SATA SALP Support", &EN_DIS,
Help "Enable/disable SATA Aggressive Link Power Management."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsEnable, "Enable SATA ports", HEX,
Help "Enable/disable SATA ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlp, "Enable SATA DEVSLP Feature", HEX,
Help "Enable/disable SATA DEVSLP per port. 0 is disable, 1 is enable. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortDevSlpPinMux, "SATA DEVSLP GPIO Pin", HEX,
Help "Select SATA DEVSLP Pin. Refer to GPIO_*_MUXING_SATA_DEVSLP_x* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortUsb20Enable, "Enable USB2 ports", HEX,
Help "Enable/disable per USB2 ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortUsb30Enable, "Enable USB3 ports", HEX,
Help "Enable/disable per USB3 ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_XdciEnable, "Enable xDCI controller", &EN_DIS,
Help "Enable/disable to xDCI controller."
EditNum $gPlatformFspPkgTokenSpaceGuid_DevIntConfigPtr, "Address of PCH_DEVICE_INTERRUPT_CONFIG table.", HEX,
Help "The address of the table of PCH_DEVICE_INTERRUPT_CONFIG."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NumOfDevIntConfig, "Number of DevIntConfig Entry", HEX,
Help "Number of Device Interrupt Configuration Entry. If this is not zero, the DevIntConfigPtr must not be NULL."
"Valid range: 0x00 ~ 0x40"
EditNum $gPlatformFspPkgTokenSpaceGuid_PxRcConfig, "PIRQx to IRQx Map Config", HEX,
Help "PIRQx to IRQx mapping. The valid value is 0x00 to 0x0F for each. First byte is for PIRQA, second byte is for PIRQB, and so on. The setting is only available in Legacy 8259 PCI mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GpioIrqRoute, "Select GPIO IRQ Route", HEX,
Help "GPIO IRQ Select. The valid value is 14 or 15."
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SciIrqSelect, "Select SciIrqSelect", HEX,
Help "SCI IRQ Select. The valid value is 9, 10, 11, and 20, 21, 22, 23 for APIC only."
"Valid range: 0x00 ~ 0x17"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcoIrqSelect, "Select TcoIrqSelect", HEX,
Help "TCO IRQ Select. The valid value is 9, 10, 11, 20, 21, 22, 23."
"Valid range: 0x00 ~ 0x17"
Combo $gPlatformFspPkgTokenSpaceGuid_TcoIrqEnable, "Enable/Disable Tco IRQ", &EN_DIS,
Help "Enable/disable TCO IRQ"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTableEntryNum, "PCH HDA Verb Table Entry Number", HEX,
Help "Number of Entries in Verb Table."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTablePtr, "PCH HDA Verb Table Pointer", HEX,
Help "Pointer to Array of pointers to Verb Table."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataEnable, "Enable SATA", &EN_DIS,
Help "Enable/disable SATA controller."
Combo $gPlatformFspPkgTokenSpaceGuid_SataMode, "SATA Mode", &gPlatformFspPkgTokenSpaceGuid_SataMode,
Help "Select SATA controller working mode."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMode, "SPIn Device Mode", HEX,
Help "Selects SPI operation mode. N represents controller index: SPI0, SPI1, ... Available modes: 0:SerialIoSpiDisabled, 1:SerialIoSpiPci, 2:SerialIoSpiHidden"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPolarity, "SPI<N> Chip Select Polarity", HEX,
Help "Sets polarity for each chip Select. Available options: 0:SerialIoSpiCsActiveLow, 1:SerialIoSpiCsActiveHigh"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsEnable, "SPI<N> Chip Select Enable", HEX,
Help "0:Disabled, 1:Enabled. Enables GPIO for CS0 or CS1 if it is Enabled"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiDefaultCsOutput, "SPIn Default Chip Select Output", HEX,
Help "Sets Default CS as Output. N represents controller index: SPI0, SPI1, ... Available options: 0:CS0, 1:CS1"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsMode, "SPIn Default Chip Select Mode HW/SW", HEX,
Help "Sets Default CS Mode Hardware or Software. N represents controller index: SPI0, SPI1, ... Available options: 0:HW, 1:SW"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsState, "SPIn Default Chip Select State Low/High", HEX,
Help "Sets Default CS State Low or High. N represents controller index: SPI0, SPI1, ... Available options: 0:Low, 1:High"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartMode, "UARTn Device Mode", HEX,
Help "Selects Uart operation mode. N represents controller index: Uart0, Uart1, ... Available modes: 0:SerialIoUartDisabled, 1:SerialIoUartPci, 2:SerialIoUartHidden, 3:SerialIoUartCom, 4:SerialIoUartSkipInit"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartBaudRate, "Default BaudRate for each Serial IO UART", HEX,
Help "Set default BaudRate Supported from 0 - default to 6000000"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartParity, "Default ParityType for each Serial IO UART", HEX,
Help "Set default Parity. 0: DefaultParity, 1: NoParity, 2: EvenParity, 3: OddParity"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDataBits, "Default DataBits for each Serial IO UART", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartStopBits, "Default StopBits for each Serial IO UART", HEX,
Help "Set default stop bits. 0: DefaultStopBits, 1: OneStopBit, 2: OneFiveStopBits, 3: TwoStopBits"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating, "Power Gating mode for each Serial IO UART that works in COM mode", HEX,
Help "Set Power Gating. 0: Disabled, 1: Enabled, 2: Auto"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDmaEnable, "Enable Dma for each Serial IO UART that supports it", HEX,
Help "Set DMA/PIO mode. 0: Disabled, 1: Enabled"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartAutoFlow, "Enables UART hardware flow control, CTS and RTS lines", HEX,
Help "Enables UART hardware flow control, CTS and RTS lines."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartRtsPinMuxPolicy, "SerialIoUartRtsPinMuxPolicy", HEX,
Help "Select SerialIo Uart Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartCtsPinMuxPolicy, "SerialIoUartCtsPinMuxPolicy", HEX,
Help "Select SerialIo Uart Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartRxPinMuxPolicy, "SerialIoUartRxPinMuxPolicy", HEX,
Help "Select SerialIo Uart Rx pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RX* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartTxPinMuxPolicy, "SerialIoUartTxPinMuxPolicy", HEX,
Help "Select SerialIo Uart Tx pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_TX* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI2cMode, "I2Cn Device Mode", HEX,
Help "Selects I2c operation mode. N represents controller index: I2c0, I2c1, ... Available modes: 0:SerialIoI2cDisabled, 1:SerialIoI2cPci, 2:SerialIoI2cHidden"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSdaPinMux, "Serial IO I2C SDA Pin Muxing", HEX,
Help "Select SerialIo I2c Sda pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I2Cx_SDA* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSclPinMux, "Serial IO I2C SCL Pin Muxing", HEX,
Help "Select SerialIo I2c Scl pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I2Cx_SCL* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cPadsTermination, "PCH SerialIo I2C Pads Termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C0,I2C1,... pads termination respectively. One byte for each controller, byte0 for I2C0, byte1 for I2C1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshGpGpioPinMuxing, "ISH GP GPIO Pin Muxing", HEX,
Help "Determines ISH GP GPIO Pin muxing. See GPIO_*_MUXING_ISH_GP_x_GPIO_*. 'x' are GP_NUMBER"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRxPinMuxing, "ISH UART Rx Pin Muxing", HEX,
Help "Determines ISH UART Rx Pin muxing. See GPIO_*_MUXING_ISH_UARTx_TXD_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartTxPinMuxing, "ISH UART Tx Pin Muxing", HEX,
Help "Determines ISH UART Tx Pin muxing. See GPIO_*_MUXING_ISH_UARTx_RXD_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRtsPinMuxing, "ISH UART Rts Pin Muxing", HEX,
Help "Select ISH UART Rts Pin muxing. Refer to GPIO_*_MUXING_ISH_UARTx_RTS_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartCtsPinMuxing, "ISH UART Rts Pin Muxing", HEX,
Help "Select ISH UART Cts Pin muxing. Refer to GPIO_*_MUXING_ISH_UARTx_CTS_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPinMuxing, "ISH I2C SDA Pin Muxing", HEX,
Help "Select ISH I2C SDA Pin muxing. Refer to GPIO_*_MUXING_ISH_I2Cx_SDA_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSclPinMuxing, "ISH I2C SCL Pin Muxing", HEX,
Help "Select ISH I2C SCL Pin muxing. Refer to GPIO_*_MUXING_ISH_I2Cx_SCL_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPinMuxing, "ISH SPI MOSI Pin Muxing", HEX,
Help "Select ISH SPI MOSI Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_MOSI_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPinMuxing, "ISH SPI MISO Pin Muxing", HEX,
Help "Select ISH SPI MISO Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_MISO_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiClkPinMuxing, "ISH SPI CLK Pin Muxing", HEX,
Help "Select ISH SPI CLK Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_CLK_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiCsPinMuxing, "ISH SPI CS#N Pin Muxing", HEX,
Help "Select ISH SPI CS#N Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_CS<N>_* for possible values. N-SPI number, 0-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshGpGpioPadTermination, "ISH GP GPIO Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo GP#N GPIO pads termination respectively. #N are GP_NUMBER, not strictly relate to indexes of this table. Index 0-23 -> ISH_GP_0-23, Index 24-25 -> ISH_GP_30-31"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRxPadTermination, "ISH UART Rx Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Rx pads termination respectively. #N-byte for each controller, byte0 for UART0 Rx, byte1 for UART1 Rx, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartTxPadTermination, "ISH UART Tx Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Tx pads termination respectively. #N-byte for each controller, byte0 for UART0 Tx, byte1 for UART1 Tx, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRtsPadTermination, "ISH UART Rts Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Rts pads termination respectively. #N-byte for each controller, byte0 for UART0 Rts, byte1 for UART1 Rts, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartCtsPadTermination, "ISH UART Rts Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Cts pads termination respectively. #N-byte for each controller, byte0 for UART0 Cts, byte1 for UART1 Cts, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPadTermination, "ISH I2C SDA Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Sda pads termination respectively. #N-byte for each controller, byte0 for I2C0 Sda, byte1 for I2C1 Sda, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSclPadTermination, "ISH I2C SCL Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Scl pads termination respectively. #N-byte for each controller, byte0 for I2C0 Scl, byte1 for I2C1 Scl, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPadTermination, "ISH SPI MOSI Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Mosi pads termination respectively. #N-byte for each controller, byte0 for SPI0 Mosi, byte1 for SPI1 Mosi, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPadTermination, "ISH SPI MISO Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Miso pads termination respectively. #N-byte for each controller, byte0 for SPI0 Miso, byte1 for SPI1 Miso, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiClkPadTermination, "ISH SPI CLK Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Clk pads termination respectively. #N-byte for each controller, byte0 for SPI0 Clk, byte1 for SPI1 Clk, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiCsPadTermination, "ISH SPI CS#N Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Cs#M pads termination respectively. N*M-byte for each controller, byte0 for SPI0 Cs0, byte1 for SPI1 Cs1, SPI1 Cs0, byte2, SPI1 Cs1, byte3"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiCsEnable, "Enable PCH ISH SPI Cs#N pins assigned", HEX,
Help "Set if ISH SPI Cs#N pins are to be enabled by BIOS. 0: Disable; 1: Enable. N-Cs number: 0-1"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPetxiset, "USB Per Port HS Preemphasis Bias", HEX,
Help "USB Per Port HS Preemphasis Bias. 000b-0mV, 001b-11.25mV, 010b-16.9mV, 011b-28.15mV, 100b-28.15mV, 101b-39.35mV, 110b-45mV, 111b-56.3mV. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyTxiset, "USB Per Port HS Transmitter Bias", HEX,
Help "USB Per Port HS Transmitter Bias. 000b-0mV, 001b-11.25mV, 010b-16.9mV, 011b-28.15mV, 100b-28.15mV, 101b-39.35mV, 110b-45mV, 111b-56.3mV, One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPredeemp, "USB Per Port HS Transmitter Emphasis", HEX,
Help "USB Per Port HS Transmitter Emphasis. 00b - Emphasis OFF, 01b - De-emphasis ON, 10b - Pre-emphasis ON, 11b - Pre-emphasis & De-emphasis ON. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPehalfbit, "USB Per Port Half Bit Pre-emphasis", HEX,
Help "USB Per Port Half Bit Pre-emphasis. 1b - half-bit pre-emphasis, 0b - full-bit pre-emphasis. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmphEnable, "Enable the write to USB 3.0 TX Output -3.5dB De-Emphasis Adjustment", HEX,
Help "Enable the write to USB 3.0 TX Output -3.5dB De-Emphasis Adjustment. Each value in arrary can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmph, "USB 3.0 TX Output -3.5dB De-Emphasis Adjustment Setting", HEX,
Help "USB 3.0 TX Output -3.5dB De-Emphasis Adjustment Setting, HSIO_TX_DWORD5[21:16], <b>Default = 29h</b> (approximately -3.5dB De-Emphasis). One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmpEnable, "Enable the write to USB 3.0 TX Output Downscale Amplitude Adjustment", HEX,
Help "Enable the write to USB 3.0 TX Output Downscale Amplitude Adjustment, Each value in arrary can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmp, "USB 3.0 TX Output Downscale Amplitude Adjustment", HEX,
Help "USB 3.0 TX Output Downscale Amplitude Adjustment, HSIO_TX_DWORD8[21:16], <b>Default = 00h</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLanEnable, "Enable LAN", &EN_DIS,
Help "Enable/disable LAN controller."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnEnable, "Enable PCH TSN", &EN_DIS,
Help "Enable/disable TSN on the PCH."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed, "TSN Link Speed", &gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed,
Help "Set TSN Link Speed."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressHigh, "PCH TSN MAC Address High Bits", HEX,
Help "Set TSN MAC Address High."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressLow, "PCH TSN MAC Address Low Bits", HEX,
Help "Set TSN MAC Address Low."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PciePtm, "PCIe PTM enable/disable", HEX,
Help "Enable/disable Precision Time Measurement for PCIE Root Ports."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieDpc, "PCIe DPC enable/disable", HEX,
Help "Enable/disable Downstream Port Containment for PCIE Root Ports."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEdpc, "PCIe DPC extensions enable/disable", HEX,
Help "Enable/disable Downstream Port Containment Extensions for PCIE Root Ports."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UsbPdoProgramming, "USB PDO Programming", &EN_DIS,
Help "Enable/disable PDO programming for USB in PEI phase. Disabling will allow for programming during later phase. 1: enable, 0: disable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcPowerButtonDebounce, "Power button debounce configuration", HEX,
Help "Debounce time for PWRBTN in microseconds. For values not supported by HW, they will be rounded down to closest supported on. 0: disable, 250-1024000us: supported range"
"Valid range: 0x00 ~ 0x009C4000"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiBmeMasterSlaveEnabled, "PCH eSPI Host and Device BME enabled", &EN_DIS,
Help "PCH eSPI Host and Device BME enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiLockLinkConfiguration, "PCH eSPI Link Configuration Lock (SBLCL)", &EN_DIS,
Help "Enable/Disable lock of communication through SET_CONFIG/GET_CONFIG to eSPI slaves addresseses from range 0x0 - 0x7FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailEnabledStates, "Mask to enable the usage of external V1p05 VR rail in specific S0ix or Sx states", HEX,
Help "Enable External V1P05 Rail in: BIT0:S0i1/S0i2, BIT1:S0i3, BIT2:S3, BIT3:S4, BIT4:S5, BIT5:S0"
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailSupportedVoltageStates, "Mask to enable the platform configuration of external V1p05 VR rail", HEX,
Help "External V1P05 Rail Supported Configuration"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailVoltage, "External V1P05 Voltage Value that will be used in S0i2/S0i3 states", HEX,
Help "Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...)"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMax, "External V1P05 Icc Max Value", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailEnabledStates, "Mask to enable the usage of external Vnn VR rail in specific S0ix or Sx states", HEX,
Help "Enable External Vnn Rail in: BIT0:S0i1/S0i2, BIT1:S0i3, BIT2:S3, BIT3:S4, BIT5:S5"
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSupportedVoltageStates, "Mask to enable the platform configuration of external Vnn VR rail", HEX,
Help "External Vnn Rail Supported Configuration"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailVoltage, "External Vnn Voltage Value that will be used in S0ix/Sx states", HEX,
Help "Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...), Default is set to 420"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMax, "External Vnn Icc Max Value that will be used in S0ix/Sx states", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxEnabledStates, "Mask to enable the usage of external Vnn VR rail in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Enable External Vnn Rail in Sx: BIT0-1:Reserved, BIT2:S3, BIT3:S4, BIT4:S5, BIT5:S0"
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxVoltage, "External Vnn Voltage Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...)"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMax, "External Vnn Icc Max Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxLowToHighCurModeVolTranTime, "Transition time in microseconds from Low Current Mode Voltage to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to low current mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToHighCurModeVolTranTime, "Transition time in microseconds from Retention Mode Voltage to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to retention mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToLowCurModeVolTranTime, "Transition time in microseconds from Retention Mode Voltage to Low Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to retention mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxOffToHighCurModeVolTranTime, "Transition time in microseconds from Off (0V) to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 Transition to 0V is disabled."
"Valid range: 0x0 ~ 0x7FF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcDbgMsgEn, "PMC Debug Message Enable", &EN_DIS,
Help "When Enabled, PMC HW will send debug messages to trace hub; When Disabled, PMC HW will never send debug meesages to trace hub. Noted: When Enabled, may not enter S0ix"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinPtr, "Pointer of ChipsetInit Binary", HEX,
Help "ChipsetInit Binary Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinLen, "Length of ChipsetInit Binary", HEX,
Help "ChipsetInit Binary Length."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchFivrDynPm, "FIVR Dynamic Power Management", &EN_DIS,
Help "Enable/Disable FIVR Dynamic Power Management."
Combo $gPlatformFspPkgTokenSpaceGuid_PchFivrVccstIccMaxControl, "FIVR VCCST ICCMax Control", &EN_DIS,
Help "Enable/Disable FIVR VCCST ICCMax Control."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMaximum, "External V1P05 Icc Max Value", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMaximum, "External Vnn Icc Max Value that will be used in S0ix/Sx states", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMaximum, "External Vnn Icc Max Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
Combo $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable, "Extented BIOS Direct Read Decode enable", &EN_DIS,
Help "Enable/Disable access to bigger than 16MB BIOS Region through Direct Memory Reads. 0: disabled (default), 1: enabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase, "Extended BIOS Direct Read Decode Range base", HEX,
Help "Bits of 31:16 of a memory address that'll be a base for Extended BIOS Direct Read Decode."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeLimit, "Extended BIOS Direct Read Decode Range limit", HEX,
Help "Bits of 31:16 of a memory address that'll be a limit for Extended BIOS Direct Read Decode."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciUaolEnable, "USB Audio Offload enable", &EN_DIS,
Help "Enable/Disable USB Audio Offload capabilites. 0: disabled, 1: enabled (default)"
EditNum $gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinPtr, "Pointer of SYNPS PHY Binary", HEX,
Help "ChipsetInit Binary Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinLen, "Length of SYNPS PHY Binary", HEX,
Help "ChipsetInit Binary Length."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviMode, "CNVi Configuration", &gPlatformFspPkgTokenSpaceGuid_CnviMode,
Help "This option allows for automatic detection of Connectivity Solution. [Auto Detection] assumes that CNVi will be enabled when available, [Disable] allows for disabling CNVi."
Combo $gPlatformFspPkgTokenSpaceGuid_CnviWifiCore, "CNVi Wi-Fi Core", &EN_DIS,
Help "Enable/Disable CNVi Wi-Fi Core, Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviBtCore, "CNVi BT Core", &EN_DIS,
Help "Enable/Disable CNVi BT Core, Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviBtAudioOffload, "CNVi BT Audio Offload", &EN_DIS,
Help "Enable/Disable BT Audio Offload, Default is DISABLE. 0: DISABLE, 1: ENABLE"
EditNum $gPlatformFspPkgTokenSpaceGuid_CnviRfResetPinMux, "CNVi RF_RESET pin muxing", HEX,
Help "Select CNVi RF_RESET# pin depending on board routing. ADP-P/M: GPP_A8 = 0x2942E408(default) or GPP_F4 = 0x194CE404. ADP-S: 0. Refer to GPIO_*_MUXING_CNVI_RF_RESET_* in GpioPins*.h."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CnviClkreqPinMux, "CNVi CLKREQ pin muxing", HEX,
Help "Select CNVi CLKREQ pin depending on board routing. ADP-P/M: GPP_A9 = 0x3942E609(default) or GPP_F5 = 0x394CE605. ADP-S: 0. Refer to GPIO_*_MUXING_CNVI_CRF_XTAL_CLKREQ_* in GpioPins*.h."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiHostC10ReportEnable, "Enable Host C10 reporting through eSPI", &EN_DIS,
Help "Enable/disable Host C10 reporting to Device via eSPI Virtual Wire."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcUsb2PhySusPgEnable, "PCH USB2 PHY Power Gating enable", &EN_DIS,
Help "1: Will enable USB2 PHY SUS Well Power Gating, 0: Will not enable PG of USB2 PHY Sus Well PG"
Combo $gPlatformFspPkgTokenSpaceGuid_PchUsbOverCurrentEnable, "PCH USB OverCurrent mapping enable", &EN_DIS,
Help "1: Will program USB OC pin mapping in xHCI controller memory, 0: Will clear OC pin mapping allow for NOA usage of OC pins"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiLgmrEnable, "Espi Lgmr Memory Range decode ", &EN_DIS,
Help "This option enables or disables espi lgmr "
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailCtrlRampTmr, "External V1P05 Control Ramp Timer value", HEX,
Help "Hold off time to be used when changing the v1p05_ctrl for external bypass value in us"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailCtrlRampTmr, "External VNN Control Ramp Timer value", HEX,
Help "Hold off time to be used when changing the vnn_ctrl for external bypass value in us"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlpResetConfig, "Set SATA DEVSLP GPIO Reset Config", HEX,
Help "Set SATA DEVSLP GPIO Reset Config per port. 0x00 - GpioResetDefault, 0x01 - GpioResumeReset, 0x03 - GpioHostDeepReset, 0x05 - GpioPlatformReset, 0x07 - GpioDswReset. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHotEnable, "PCHHOT# pin", &EN_DIS,
Help "Enable PCHHOT# pin assertion when temperature is higher than PchHotLevel. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SataLedEnable, "SATA LED", &EN_DIS,
Help "SATA LED indicating SATA controller activity. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmVrAlert, "VRAlert# Pin", &EN_DIS,
Help "When VRAlert# feature pin is enabled and its state is '0', the PMC requests throttling to a T3 Tstate to the PCH throttling unit.. 0: disable, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotImplemented, "PCH PCIe root port connection type", HEX,
Help "0: built-in device, 1:slot"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAcsEnabled, "PCIE RP Access Control Services Extended Capability", HEX,
Help "Enable/Disable PCIE RP Access Control Services Extended Capability"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpEnableCpm, "PCIE RP Clock Power Management", HEX,
Help "Enable/Disable PCIE RP Clock Power Management, even if disabled, CLKREQ# signal can still be controlled by L1 PM substates mechanism"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpDetectTimeoutMs, "PCIE RP Detect Timeout Ms", HEX,
Help "The number of milliseconds within 0~65535 in reference code will wait for link to exit Detect state for enabled ports before assuming there is no device and potentially disabling the port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcModPhySusPgEnable, "ModPHY SUS Power Domain Dynamic Gating", &EN_DIS,
Help "Enable/Disable ModPHY SUS Power Domain Dynamic Gating. Setting not supported on PCH-H. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcV1p05PhyExtFetControlEn, "V1p05-PHY supply external FET control", &EN_DIS,
Help "Enable/Disable control using EXT_PWR_GATE# pin of external FET to power gate v1p05-PHY supply. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcV1p05IsExtFetControlEn, "V1p05-IS supply external FET control", &EN_DIS,
Help "Enable/Disable control using EXT_PWR_GATE2# pin of external FET to power gate v1p05-IS supply. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable, "PCH xHCI enable HS Interrupt IN Alarm", &EN_DIS,
Help "PCH xHCI enable HS Interrupt IN Alarm. 0: disabled (default), 1: enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPwrOptEnable, "Enable Power Optimizer", &EN_DIS,
Help "Enable DMI Power Optimizer on PCH side."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchWriteProtectionEnable, "PCH Flash Protection Ranges Write Enble", HEX,
Help "Write or erase is blocked by hardware."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchReadProtectionEnable, "PCH Flash Protection Ranges Read Enble", HEX,
Help "Read is blocked by hardware."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeLimit, "PCH Protect Range Limit", HEX,
Help "Left shifted address by 12 bits with address bits 11:0 are assumed to be FFFh for limit comparison."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeBase, "PCH Protect Range Base", HEX,
Help "Left shifted address by 12 bits with address bits 11:0 are assumed to be 0."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaPme, "Enable Pme", &EN_DIS,
Help "Enable Azalia wake-on-ring."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency, "HD Audio Link Frequency", &gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency,
Help "HDA Link Freq (PCH_HDAUDIO_LINK_FREQUENCY enum): 0: 6MHz, 1: 12MHz, 2: 24MHz."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiCs0Enable, "Enable PCH ISH SPI Cs0 pins assigned", HEX,
Help "Set if ISH SPI Cs0 pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIoApicEntry24_119, "Enable PCH Io Apic Entry 24-119", &EN_DIS,
Help "0: Disable; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIoApicId, "PCH Io Apic ID", HEX,
Help "This member determines IOAPIC ID. Default is 0x02."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiEnable, "Enable PCH ISH SPI pins assigned", HEX,
Help "Set if ISH SPI native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshUartEnable, "Enable PCH ISH UART pins assigned", HEX,
Help "Set if ISH UART native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshI2cEnable, "Enable PCH ISH I2C pins assigned", HEX,
Help "Set if ISH I2C native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshGpEnable, "Enable PCH ISH GP pins assigned", HEX,
Help "Set if ISH GP native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIshPdtUnlock, "PCH ISH PDT Unlock Msg", &EN_DIS,
Help "0: False; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLanLtrEnable, "Enable PCH Lan LTR capabilty of PCH internal LAN", &EN_DIS,
Help "0: Disable; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosLock, "Enable LOCKDOWN BIOS LOCK", &EN_DIS,
Help "Enable the BIOS Lock feature and set EISS bit (D31:F5:RegDCh[5]) for the BIOS region protection."
Combo $gPlatformFspPkgTokenSpaceGuid_PchCrid, "PCH Compatibility Revision ID", &EN_DIS,
Help "This member describes whether or not the CRID feature of PCH should be enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_RtcBiosInterfaceLock, "RTC BIOS Interface Lock", &EN_DIS,
Help "Enable RTC BIOS interface lock. When set, prevents RTC TS (BUC.TS) from being changed."
Combo $gPlatformFspPkgTokenSpaceGuid_RtcMemoryLock, "RTC Cmos Memory Lock", &EN_DIS,
Help "Enable RTC lower and upper 128 byte Lock bits to lock Bytes 38h-3Fh in the upper and and lower 128-byte bank of RTC RAM."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpHotPlug, "Enable PCIE RP HotPlug", HEX,
Help "Indicate whether the root port is hot plug available."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPmSci, "Enable PCIE RP Pm Sci", HEX,
Help "Indicate whether the root port power manager SCI is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpTransmitterHalfSwing, "Enable PCIE RP Transmitter Half Swing", HEX,
Help "Indicate whether the Transmitter Half Swing is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpClkReqDetect, "Enable PCIE RP Clk Req Detect", HEX,
Help "Probe CLKREQ# signal before enabling CLKREQ# based power management."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAdvancedErrorReporting, "PCIE RP Advanced Error Report", HEX,
Help "Indicate whether the Advanced Error Reporting is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpUnsupportedRequestReport, "PCIE RP Unsupported Request Report", HEX,
Help "Indicate whether the Unsupported Request Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpFatalErrorReport, "PCIE RP Fatal Error Report", HEX,
Help "Indicate whether the Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNoFatalErrorReport, "PCIE RP No Fatal Error Report", HEX,
Help "Indicate whether the No Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpCorrectableErrorReport, "PCIE RP Correctable Error Report", HEX,
Help "Indicate whether the Correctable Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnFatalError, "PCIE RP System Error On Fatal Error", HEX,
Help "Indicate whether the System Error on Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnNonFatalError, "PCIE RP System Error On Non Fatal Error", HEX,
Help "Indicate whether the System Error on Non Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnCorrectableError, "PCIE RP System Error On Correctable Error", HEX,
Help "Indicate whether the System Error on Correctable Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpMaxPayload, "PCIE RP Max Payload", HEX,
Help "Max Payload Size supported, Default 128B, see enum PCH_PCIE_MAX_PAYLOAD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment, "Touch Host Controller Port 0 Assignment", &gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment,
Help "Assign THC Port 0"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPort0InterruptPinMuxing, "Touch Host Controller Port 0 Interrupt Pin Mux", HEX,
Help "Set THC Port 0 Pin Muxing Value if signal can be enabled on multiple pads. Refer to GPIO_*_MUXING_THC_SPIx_INTB_* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort0WakeOnTouch, "Touch Host Controller Port 0 Wake On Touch", &EN_DIS,
Help "Based on this setting vGPIO for given THC will be in native mode, and additional _CRS for wake will be exposed in ACPI"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment, "Touch Host Controller Port 1 Assignment", &gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment,
Help "Assign THC Port 1"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPort1HidResetSequencingDelay, "Touch Host Controller Port 1 Hid Over Spi Reset Sequencing Delay [ms]", HEX,
Help "Policy control for reset sequencing delay (ACPI _INI, _RST) default 300ms"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPort1InterruptPinMuxing, "Touch Host Controller Port 1 Interrupt Pin Mux", HEX,
Help "Set THC Port 1 Pin Muxing Value if signal can be enabled on multiple pads. Refer to GPIO_*_MUXING_THC_SPIx_INTB_* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort1WakeOnTouch, "Touch Host Controller Port 1 Wake On Touch", &EN_DIS,
Help "Based on this setting vGPIO for given THC will be in native mode, and additional _CRS for wake will be exposed in ACPI"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPcieSpeed, "PCIE RP Pcie Speed", HEX,
Help "Determines each PCIE Port speed capability. 0: Auto; 1: Gen1; 2: Gen2; 3: Gen3; 4: Gen4 (see: PCIE_SPEED)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPhysicalSlotNumber, "PCIE RP Physical Slot Number", HEX,
Help "Indicates the slot number for the root port. Default is the value as root port index."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpCompletionTimeout, "PCIE RP Completion Timeout", HEX,
Help "The root port completion timeout(see: PCIE_COMPLETION_TIMEOUT). Default is PchPcieCompletionTO_Default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAspm, "PCIE RP Aspm", HEX,
Help "The ASPM configuration of the root port (see: PCH_PCIE_ASPM_CONTROL). Default is PchPcieAspmAutoConfig."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpL1Substates, "PCIE RP L1 Substates", HEX,
Help "The L1 Substates configuration of the root port (see: PCH_PCIE_L1SUBSTATES_CONTROL). Default is PchPcieL1SubstatesL1_1_2."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpL1Low, "PCIE RP L1 Low Substate", HEX,
Help "The L1 Low Substate configuration of the root port. 0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrEnable, "PCIE RP Ltr Enable", HEX,
Help "Latency Tolerance Reporting Mechanism."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrConfigLock, "PCIE RP Ltr Config Lock", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqOverrideDefault, "PCIe override default settings for EQ", &EN_DIS,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqMethod, "PCIe choose EQ method", &gPlatformFspPkgTokenSpaceGuid_PcieEqMethod,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqMode, "PCIe choose EQ mode", &gPlatformFspPkgTokenSpaceGuid_PcieEqMode,
Help "Choose PCIe EQ mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqLocalTransmitterOverrideEnable, "PCIe EQ local transmitter override", &EN_DIS,
Help "Enable/Disable local transmitter override"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3NumberOfPresetsOrCoefficients, "PCIe number of valid list entries", HEX,
Help "Select number of presets or coefficients depending on the mode"
"Valid range: 0 ~ 11"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PreCursorList, "PCIe pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PostCursorList, "PCIe post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PresetList, "PCIe preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPort0HidResetSequencingDelay, "Touch Host Controller Port 0 Hid Over Spi Reset Sequencing Delay [ms]", HEX,
Help "Policy control for reset sequencing delay (ACPI _INI, _RST) default 300ms"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh1DownstreamPortTransmitterPreset, "PCIe EQ phase 1 downstream transmitter port preset", HEX,
Help "Allows to select the downstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh1UpstreamPortTransmitterPreset, "PCIe EQ phase 1 upstream tranmitter port preset", HEX,
Help "Allows to select the upstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh2LocalTransmitterOverridePreset, "PCIe EQ phase 2 local transmitter override preset", HEX,
Help "Allows to select the value of the preset used during phase 2 local transmitter override"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEnablePeerMemoryWrite, "PCIE Enable Peer Memory Write", &EN_DIS,
Help "This member describes whether Peer Memory Writes are enabled on the platform."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieComplianceTestMode, "PCIE Compliance Test Mode", &EN_DIS,
Help "Compliance Test Mode shall be enabled when using Compliance Load Board."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpFunctionSwap, "PCIE Rp Function Swap", &EN_DIS,
Help "DEPRECATED. Allows BIOS to use root port function number swapping when root port of function 0 is disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3ProgramStaticEq, "Enable/Disable PEG GEN3 Static EQ Phase1 programming", &EN_DIS,
Help "Program Gen3 EQ Phase1 Static Presets. Disabled(0x0): Disable EQ Phase1 Static Presets Programming, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4ProgramStaticEq, "Enable/Disable GEN4 Static EQ Phase1 programming", &EN_DIS,
Help "Program Gen4 EQ Phase1 Static Presets. Disabled(0x0): Disable EQ Phase1 Static Presets Programming, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmPmeB0S5Dis, "PCH Pm PME_B0_S5_DIS", &EN_DIS,
Help "When cleared (default), wake events from PME_B0_STS are allowed in S5 if PME_B0_EN = 1."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpImrEnabled, "PCIE IMR", &EN_DIS,
Help "Enables Isolated Memory Region for PCIe."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpImrSelection, "PCIE IMR port number", HEX,
Help "Selects PCIE root port number for IMR feature."
"Valid range: 0x0 ~ 23"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWolEnableOverride, "PCH Pm Wol Enable Override", &EN_DIS,
Help "Corresponds to the WOL Enable Override bit in the General PM Configuration B (GEN_PMCON_B) register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmPcieWakeFromDeepSx, "PCH Pm Pcie Wake From DeepSx", &EN_DIS,
Help "Determine if enable PCIe to wake from deep Sx."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanEnable, "PCH Pm WoW lan Enable", &EN_DIS,
Help "Determine if WLAN wake from Sx, corresponds to the HOST_WLAN_PP_EN bit in the PWRM_CFG3 register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanDeepSxEnable, "PCH Pm WoW lan DeepSx Enable", &EN_DIS,
Help "Determine if WLAN wake from DeepSx, corresponds to the DSX_WLAN_PP_EN bit in the PWRM_CFG3 register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmLanWakeFromDeepSx, "PCH Pm Lan Wake From DeepSx", &EN_DIS,
Help "Determine if enable LAN to wake from deep Sx."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDeepSxPol, "PCH Pm Deep Sx Pol", &EN_DIS,
Help "Deep Sx Policy."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpS3MinAssert, "PCH Pm Slp S3 Min Assert", HEX,
Help "SLP_S3 Minimum Assertion Width Policy. Default is PchSlpS350ms."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpS4MinAssert, "PCH Pm Slp S4 Min Assert", HEX,
Help "SLP_S4 Minimum Assertion Width Policy. Default is PchSlpS44s."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpSusMinAssert, "PCH Pm Slp Sus Min Assert", HEX,
Help "SLP_SUS Minimum Assertion Width Policy. Default is PchSlpSus4s."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpAMinAssert, "PCH Pm Slp A Min Assert", HEX,
Help "SLP_A Minimum Assertion Width Policy. Default is PchSlpA2s."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEnableDbcObs, "USB Overcurrent Override for VISA", &EN_DIS,
Help "This option overrides USB Over Current enablement state that USB OC will be disabled after enabling this option. Enable when VISA pin is muxed with USB OC"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmSlpStrchSusUp, "PCH Pm Slp Strch Sus Up", &EN_DIS,
Help "Enable SLP_X Stretching After SUS Well Power Up."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmSlpLanLowDc, "PCH Pm Slp Lan Low Dc", &EN_DIS,
Help "Enable/Disable SLP_LAN# Low on DC Power."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPwrBtnOverridePeriod, "PCH Pm Pwr Btn Override Period", HEX,
Help "PCH power button override period. 000b-4s, 001b-6s, 010b-8s, 011b-10s, 100b-12s, 101b-14s."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableDsxAcPresentPulldown, "PCH Pm Disable Dsx Ac Present Pulldown", &EN_DIS,
Help "When Disable, PCH will internal pull down AC_PRESENT in deep SX and during G3 exit."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableNativePowerButton, "PCH Pm Disable Native Power Button", &EN_DIS,
Help "Power button native mode disable."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmMeWakeSts, "PCH Pm ME_WAKE_STS", &EN_DIS,
Help "Clear the ME_WAKE_STS bit in the Power and Reset Status (PRSTS) register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWolOvrWkSts, "PCH Pm WOL_OVR_WK_STS", &EN_DIS,
Help "Clear the WOL_OVR_WK_STS bit in the Power and Reset Status (PRSTS) register."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPwrCycDur, "PCH Pm Reset Power Cycle Duration", HEX,
Help "Could be customized in the unit of second. Please refer to EDS for all support settings. 0 is default, 1 is 1 second, 2 is 2 seconds, ..."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPciePllSsc, "PCH Pm Pcie Pll Ssc", HEX,
Help "Specifies the Pcie Pll Spread Spectrum Percentage. The default is 0xFF: AUTO - No BIOS override."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLegacyIoLowLatency, "PCH Legacy IO Low Latency Enable", &EN_DIS,
Help "Set to enable low latency of legacy IO. <b>0: Disable</b>, 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SataPwrOptEnable, "PCH Sata Pwr Opt Enable", &EN_DIS,
Help "SATA Power Optimizer on PCH side."
Combo $gPlatformFspPkgTokenSpaceGuid_EsataSpeedLimit, "PCH Sata eSATA Speed Limit", &EN_DIS,
Help "When enabled, BIOS will configure the PxSCTL.SPD to 2 to limit the eSATA port speed."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataSpeedLimit, "PCH Sata Speed Limit", HEX,
Help "Indicates the maximum speed the SATA controller can support 0h: PchSataSpeedDefault."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsHotPlug, "Enable SATA Port HotPlug", HEX,
Help "Enable SATA Port HotPlug."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsInterlockSw, "Enable SATA Port Interlock Sw", HEX,
Help "Enable SATA Port Interlock Sw."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsExternal, "Enable SATA Port External", HEX,
Help "Enable SATA Port External."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsSpinUp, "Enable SATA Port SpinUp", HEX,
Help "Enable the COMRESET initialization Sequence to the device."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsSolidStateDrive, "Enable SATA Port Solid State Drive", HEX,
Help "0: HDD; 1: SSD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsEnableDitoConfig, "Enable SATA Port Enable Dito Config", HEX,
Help "Enable DEVSLP Idle Timeout settings (DmVal, DitoVal)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDmVal, "Enable SATA Port DmVal", HEX,
Help "DITO multiplier. Default is 15."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDitoVal, "Enable SATA Port DmVal", HEX,
Help "DEVSLP Idle Timeout (DITO), Default is 625."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsZpOdd, "Enable SATA Port ZpOdd", HEX,
Help "Support zero power ODD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataRstRaidDeviceId, "PCH Sata Rst Raid Alternate Id", &EN_DIS,
Help "Enable RAID Alternate ID."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieEnable, "PCH Sata Rst Pcie Storage Remap enable", HEX,
Help "Enable Intel RST for PCIe Storage remapping."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieStoragePort, "PCH Sata Rst Pcie Storage Port", HEX,
Help "Intel RST for PCIe Storage remapping - PCIe Port Selection (1-based, 0 = autodetect)."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieDeviceResetDelay, "PCH Sata Rst Pcie Device Reset Delay", HEX,
Help "PCIe Storage Device Reset Delay in milliseconds. Default value is 100ms"
"Valid range: 0x00 ~ 0xFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UfsEnable, "UFS enable/disable", &EN_DIS,
Help "Enable/Disable UFS controller, One byte for each Controller - (1,0) to enable controller 0 and (0,1) to enable controller 1 "
Combo $gPlatformFspPkgTokenSpaceGuid_IehMode, "IEH Mode", &gPlatformFspPkgTokenSpaceGuid_IehMode,
Help "Integrated Error Handler Mode, 0: Bypass, 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT0Level, "Thermal Throttling Custimized T0Level Value", HEX,
Help "Custimized T0Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT1Level, "Thermal Throttling Custimized T1Level Value", HEX,
Help "Custimized T1Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT2Level, "Thermal Throttling Custimized T2Level Value", HEX,
Help "Custimized T2Level value."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTEnable, "Enable The Thermal Throttle", &EN_DIS,
Help "Enable the thermal throttle function."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTState13Enable, "PMSync State 13", &EN_DIS,
Help "When set to 1 and the programmed GPIO pin is a 1, then PMSync state 13 will force at least T2 state."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTLock, "Thermal Throttle Lock", &EN_DIS,
Help "Thermal Throttle Lock."
Combo $gPlatformFspPkgTokenSpaceGuid_TTSuggestedSetting, "Thermal Throttling Suggested Setting", &EN_DIS,
Help "Thermal Throttling Suggested Setting."
Combo $gPlatformFspPkgTokenSpaceGuid_TTCrossThrottling, "Enable PCH Cross Throttling", &EN_DIS,
Help "Enable/Disable PCH Cross Throttling"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiTsawEn, "DMI Thermal Sensor Autonomous Width Enable", &EN_DIS,
Help "DMI Thermal Sensor Autonomous Width Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiSuggestedSetting, "DMI Thermal Sensor Suggested Setting", &EN_DIS,
Help "DMT thermal sensor suggested representative values."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS0TW, "Thermal Sensor 0 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS0TW,
Help "Thermal Sensor 0 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS1TW, "Thermal Sensor 1 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS1TW,
Help "Thermal Sensor 1 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS2TW, "Thermal Sensor 2 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS2TW,
Help "Thermal Sensor 2 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS3TW, "Thermal Sensor 3 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS3TW,
Help "Thermal Sensor 3 Target Width."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T1M, "Port 0 T1 Multipler", HEX,
Help "Port 0 T1 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T2M, "Port 0 T2 Multipler", HEX,
Help "Port 0 T2 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T3M, "Port 0 T3 Multipler", HEX,
Help "Port 0 T3 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0TDisp, "Port 0 Tdispatch", HEX,
Help "Port 0 Tdispatch."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T1M, "Port 1 T1 Multipler", HEX,
Help "Port 1 T1 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T2M, "Port 1 T2 Multipler", HEX,
Help "Port 1 T2 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T3M, "Port 1 T3 Multipler", HEX,
Help "Port 1 T3 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1TDisp, "Port 1 Tdispatch", HEX,
Help "Port 1 Tdispatch."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0Tinact, "Port 0 Tinactive", HEX,
Help "Port 0 Tinactive."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataP0TDispFinit, "Port 0 Alternate Fast Init Tdispatch", &EN_DIS,
Help "Port 0 Alternate Fast Init Tdispatch."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1Tinact, "Port 1 Tinactive", HEX,
Help "Port 1 Tinactive."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataP1TDispFinit, "Port 1 Alternate Fast Init Tdispatch", &EN_DIS,
Help "Port 1 Alternate Fast Init Tdispatch."
Combo $gPlatformFspPkgTokenSpaceGuid_SataThermalSuggestedSetting, "Sata Thermal Throttling Suggested Setting", &EN_DIS,
Help "Sata Thermal Throttling Suggested Setting."
Combo $gPlatformFspPkgTokenSpaceGuid_PchMemoryThrottlingEnable, "Enable Memory Thermal Throttling", &EN_DIS,
Help "Enable Memory Thermal Throttling."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchMemoryPmsyncEnable, "Memory Thermal Throttling", HEX,
Help "Enable Memory Thermal Throttling."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchMemoryC0TransmitEnable, "Enable Memory Thermal Throttling", HEX,
Help "Enable Memory Thermal Throttling."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchMemoryPinSelection, "Enable Memory Thermal Throttling", HEX,
Help "Enable Memory Thermal Throttling."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTemperatureHotLevel, "Thermal Device Temperature", HEX,
Help "Decides the temperature."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2OverCurrentPin, "USB2 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USB 2.0 Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3OverCurrentPin, "USB3 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USB 3.0 Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrOverrideEnable, "Enable xHCI LTR override", &EN_DIS,
Help "Enables override of recommended LTR values for xHCI"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcMode, "Touch Host Controller Mode", HEX,
Help "Switch between Intel THC protocol and Industry standard HID Over SPI protocol. 0x0:Thc, 0x1:Hid"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrHighIdleTimeOverride, "xHCI High Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI High Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrMediumIdleTimeOverride, "xHCI Medium Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI Medium Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrLowIdleTimeOverride, "xHCI Low Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI Low Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGating, "Enable 8254 Static Clock Gating", &EN_DIS,
Help "Set 8254CGE=1 is required for SLP_S0 support. However, set 8254CGE=1 in POST time might fail to boot legacy OS using 8254 timer. Make sure it is disabled to support legacy OS using 8254 timer. Also enable this while S0ix is enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGatingOnS3, "Enable 8254 Static Clock Gating On S3", &EN_DIS,
Help "This is only applicable when Enable8254ClockGating is disabled. FSP will do the 8254 CGE programming on S3 resume when Enable8254ClockGatingOnS3 is enabled. This avoids the SMI requirement for the programming."
Combo $gPlatformFspPkgTokenSpaceGuid_EnableTcoTimer, "Enable TCO timer.", &EN_DIS,
Help "When FALSE, it disables PCH ACPI timer, and stops TCO timer. NOTE: This will have huge power impact when it's enabled. If TCO timer is disabled, uCode ACPI timer emulation must be enabled, and WDAT table must not be exposed to the OS."
Combo $gPlatformFspPkgTokenSpaceGuid_HybridStorageMode, "Hybrid Storage Detection and Configuration Mode", &gPlatformFspPkgTokenSpaceGuid_HybridStorageMode,
Help "Enables support for Hybrid storage devices. 0: Disabled; 1: Dynamic Configuration. Default is 0: Disabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuRootportUsedForHybridStorage, "CPU Root Port used for Hybrid Storage", HEX,
Help "Specifies the CPU root port used for Hybrid storage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchRootportUsedForCpuAttach, "PCH Root Port used for Hybrid Storage when two lanes are connected to CPU", HEX,
Help "Specifies PCH Root Port used for Hybrid Storage when two lanes are connected to CPU."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchAcpiL6dPmeHandling, "PCH GPE event handler", &EN_DIS,
Help "Enabled _L6D ACPI handler. PME GPE is shared by multiple devices So BIOS must verify the same in the ASL handler by reading offset for PMEENABLE and PMESTATUS bit"
Combo $gPlatformFspPkgTokenSpaceGuid_PsOnEnable, "Enable PS_ON.", &EN_DIS,
Help "PS_ON is a new C10 state from the CPU on desktop SKUs that enables a lower power target that will be required by the California Energy Commission (CEC). When FALSE, PS_ON is to be disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcCpuC10GatePinEnable, "Pmc Cpu C10 Gate Pin Enable", &EN_DIS,
Help "Enable/Disable platform support for CPU_C10_GATE# pin to control gating of CPU VccIO and VccSTG rails instead of SLP_S0# pin."
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl, "Pch Dmi Aspm Ctrl", &gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl,
Help "ASPM configuration on the PCH side of the DMI/OPI Link. Default is <b>PchPcieAspmL1</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiCwbEnable, "PchDmiCwbEnable", &EN_DIS,
Help "Central Write Buffer feature configurable and enabled by default"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcOsIdleEnable, "OS IDLE Mode Enable", &EN_DIS,
Help "Enable/Disable OS Idle Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PchS0ixAutoDemotion, "S0ix Auto-Demotion", &EN_DIS,
Help "Enable/Disable the Low Power Mode Auto-Demotion Host Control feature."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmLatchEventsC10Exit, "Latch Events C10 Exit", &EN_DIS,
Help "When this bit is set to 1, SLP_S0# entry events in SLP_S0_DEBUG_REGx registers are captured on C10 exit (instead of C10 entry which is default)"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrEn, "PMC ADR enable", &EN_DIS,
Help "Enable/disable asynchronous DRAM refresh"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrTimerEn, "PMC ADR timer configuration enable", &EN_DIS,
Help "Enable/disable ADR timer configuration"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrTimer1Val, "PMC ADR phase 1 timer value", HEX,
Help "Enable/disable ADR timer configuration"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrMultiplier1Val, "PMC ADR phase 1 timer multiplier value", HEX,
Help "Specify the multiplier value for phase 1 ADR timer"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrHostPartitionReset, "PMC ADR host reset partition enable", &EN_DIS,
Help "Specify whether PMC should set ADR_RST_STS bit after receiving Reset_Warn_Ack DMI message"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcOverride, "PMC ADR source select override enable", &EN_DIS,
Help "Tells the FSP to update the source select with platform value"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcSel, "PMC ADR source selection", HEX,
Help "Specify which sources should cause ADR flow"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCm, "PCIE Eq Ph3 Lane Param Cm", HEX,
Help "CPU_PCIE_EQ_LANE_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCp, "PCIE Eq Ph3 Lane Param Cp", HEX,
Help "CPU_PCIE_EQ_LANE_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3RootPortPreset, "Gen3 Root port preset values per lane", HEX,
Help "Used for programming Pcie Gen3 preset values per lane. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4RootPortPreset, "Pcie Gen4 Root port preset values per lane", HEX,
Help "Used for programming Pcie Gen4 preset values per lane. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointPreset, "Pcie Gen3 End port preset values per lane", HEX,
Help "Used for programming Pcie Gen3 preset values per lane. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointPreset, "Pcie Gen4 End port preset values per lane", HEX,
Help "Used for programming Pcie Gen4 preset values per lane. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointHint, "Pcie Gen3 End port Hint values per lane", HEX,
Help "Used for programming Pcie Gen3 Hint values per lane. Range: 0-6, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointHint, "Pcie Gen4 End port Hint values per lane", HEX,
Help "Used for programming Pcie Gen4 Hint values per lane. Range: 0-6, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieFiaProgramming, "CPU PCIe Fia Programming", &EN_DIS,
Help "Load Fia configuration if enable. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieClockGating, "CPU PCIe RootPort Clock Gating", &EN_DIS,
Help "Describes whether the PCI Express Clock Gating for each root port is enabled by platform modules. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPciePowerGating, "CPU PCIe RootPort Power Gating", &EN_DIS,
Help "Describes whether the PCI Express Power Gating for each root port is enabled by platform modules. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieComplianceTestMode, "PCIE Compliance Test Mode", &EN_DIS,
Help "Compliance Test Mode shall be enabled when using Compliance Load Board."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieEnablePeerMemoryWrite, "PCIE Enable Peer Memory Write", &EN_DIS,
Help "This member describes whether Peer Memory Writes are enabled on the platform."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpFunctionSwap, "PCIE Rp Function Swap", &EN_DIS,
Help "Allows BIOS to use root port function number swapping when root port of function 0 is disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieSlotSelection, "PCI Express Slot Selection", &EN_DIS,
Help "Select the PCIe M2 or CEMx4 slot.0: CEMx4 slot; 1: M2 slot(Default)."
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieDeviceOverrideTablePtr, "CPU PCIE device override table pointer", HEX,
Help "The PCIe device table is being used to override PCIe device ASPM settings. This is a pointer points to a 32bit address. And it's only used in PostMem phase. Please refer to CPU_PCIE_DEVICE_OVERRIDE structure for the table. Last entry VendorId must be 0."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpHotPlug, "Enable PCIE RP HotPlug", HEX,
Help "Indicate whether the root port is hot plug available."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPmSci, "Enable PCIE RP Pm Sci", HEX,
Help "Indicate whether the root port power manager SCI is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpTransmitterHalfSwing, "Enable PCIE RP Transmitter Half Swing", HEX,
Help "Indicate whether the Transmitter Half Swing is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAcsEnabled, "PCIE RP Access Control Services Extended Capability", HEX,
Help "Enable/Disable PCIE RP Access Control Services Extended Capability"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableCpm, "PCIE RP Clock Power Management", HEX,
Help "Enable/Disable PCIE RP Clock Power Management, even if disabled, CLKREQ# signal can still be controlled by L1 PM substates mechanism"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAdvancedErrorReporting, "PCIE RP Advanced Error Report", HEX,
Help "Indicate whether the Advanced Error Reporting is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnFatalError, "PCIE RP System Error On Fatal Error", HEX,
Help "Indicate whether the System Error on Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnNonFatalError, "PCIE RP System Error On Non Fatal Error", HEX,
Help "Indicate whether the System Error on Non Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnCorrectableError, "PCIE RP System Error On Correctable Error", HEX,
Help "Indicate whether the System Error on Correctable Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMaxPayload, "PCIE RP Max Payload", HEX,
Help "Max Payload Size supported, Default 128B, see enum CPU_PCIE_MAX_PAYLOAD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcEnabled, "DPC for PCIE RP Mask", HEX,
Help "Enable/disable Downstream Port Containment for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcExtensionsEnabled, "DPC Extensions PCIE RP Mask", HEX,
Help "Enable/disable DPC Extensions for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSlotImplemented, "CPU PCIe root port connection type", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3EqPh3Method, "PCIE RP Gen3 Equalization Phase Method", HEX,
Help "PCIe Gen3 Eq Ph3 Method (see CPU_PCIE_EQ_METHOD). 0: DEPRECATED, hardware equalization; 1: hardware equalization; 4: Fixed Coeficients."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4EqPh3Method, "PCIE RP Gen4 Equalization Phase Method", HEX,
Help "PCIe Gen4 Eq Ph3 Method (see CPU_PCIE_EQ_METHOD). 0: DEPRECATED, hardware equalization; 1: hardware equalization; 4: Fixed Coeficients."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPhysicalSlotNumber, "PCIE RP Physical Slot Number", HEX,
Help "Indicates the slot number for the root port. Default is the value as root port index."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAspm, "PCIE RP Aspm", HEX,
Help "The ASPM configuration of the root port (see: CPU_PCIE_ASPM_CONTROL).0: Disable; 1: CpuPcieAspmL0s; 2: CpuPcieAspmL1; 3:CpuPcieAspmL0sL1(Default)"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpL1Substates, "PCIE RP L1 Substates", HEX,
Help "The L1 Substates configuration of the root port (see: CPU_PCIE_L1SUBSTATES_CONTROL). Default is CpuPcieL1SubstatesL1_1_2."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrEnable, "PCIE RP Ltr Enable", HEX,
Help "Latency Tolerance Reporting Mechanism."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrConfigLock, "PCIE RP Ltr Config Lock", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPtmEnabled, "PTM for PCIE RP Mask", HEX,
Help "Enable/disable Precision Time Measurement for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDetectTimeoutMs, "PCIE RP Detect Timeout Ms", HEX,
Help "The number of milliseconds within 0~65535 in reference code will wait for link to exit Detect state for enabled ports before assuming there is no device and potentially disabling the port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMultiVcEnabled, "Multi-VC for PCIE RP Mask", HEX,
Help "Enable/disable Multiple Virtual Channel for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 3", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 3, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 3", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 3, HSIO_TX_DWORD9[6:0], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 2", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 2, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 2", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 2, HSIO_TX_DWORD9[14:8], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 1", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 1, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 1", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 1, HSIO_TX_DWORD9[22:16], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 0", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 0, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 0", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 0, HSIO_TX_DWORD9[30:24], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownGlobalSmi, "Enable LOCKDOWN SMI", &EN_DIS,
Help "Enable SMI_LOCK bit to prevent writes to the Global SMI Enable bit."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosInterface, "Enable LOCKDOWN BIOS Interface", &EN_DIS,
Help "Enable BIOS Interface Lock Down bit to prevent writes to the Backup Control Register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchUnlockGpioPads, "Unlock all GPIO pads", &EN_DIS,
Help "Force all GPIO pads to be unlocked for debug purpose."
Combo $gPlatformFspPkgTokenSpaceGuid_PchSbAccessUnlock, "PCH Unlock SideBand access", &EN_DIS,
Help "The SideBand PortID mask for certain end point (e.g. PSFx) will be locked before 3rd party code execution. 0: Lock SideBand access; 1: Unlock SideBand access."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxSnoopLatency, "PCIE RP Ltr Max Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxNoSnoopLatency, "PCIE RP Ltr Max No Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Non-Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMode, "PCIE RP Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMultiplier, "PCIE RP Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideValue, "PCIE RP Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMode, "PCIE RP Non Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMultiplier, "PCIE RP Non Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideValue, "PCIE RP Non Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitScale, "PCIE RP Slot Power Limit Scale", HEX,
Help "Specifies scale used for slot power limit value. Leave as 0 to set to default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitValue, "PCIE RP Slot Power Limit Value", HEX,
Help "Specifies upper limit on power supplie by slot. Leave as 0 to set to default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEnablePort8xhDecode, "PCIE RP Enable Port8xh Decode", &EN_DIS,
Help "This member describes whether PCIE root port Port 8xh Decode is enabled. 0: Disable; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPciePort8xhDecodePortIndex, "PCIE Port8xh Decode Port Index", HEX,
Help "The Index of PCIe Port that is selected for Port8xh Decode (0 Based)."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableEnergyReport, "PCH Energy Reporting", &EN_DIS,
Help "Disable/Enable PCH to CPU energy report feature."
Combo $gPlatformFspPkgTokenSpaceGuid_SataTestMode, "PCH Sata Test Mode", &EN_DIS,
Help "Allow entrance to the PCH SATA test modes."
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciOcLock, "PCH USB OverCurrent mapping lock enable", &EN_DIS,
Help "If this policy option is enabled then BIOS will program OCCFDONE bit in xHCI meaning that OC mapping data will be consumed by xHCI and OC mapping registers will be locked."
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcLpmS0ixSubStateEnableMask, "Low Power Mode Enable/Disable config mask", HEX,
Help "Configure if respective S0i2/3 sub-states are to be supported. Each bit corresponds to one sub-state (LPMx - BITx): LPM0-s0i2.0, LPM1-s0i2.1, LPM2-s0i2.2, LPM3-s0i3.0, LPM4-s0i3.1, LPM5-s0i3.2, LPM6-s0i3.3, LPM7-s0i3.4."
"Valid range: 0x00 ~ 0xFF"
EndPage
Page "USB-C/Thunderbolt (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieMultipleSegmentEnabled, "iTBT PCIe Multiple Segment setting", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie0En, "TCSS Thunderbolt PCIE Root Port 0 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 0. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie1En, "TCSS Thunderbolt PCIE Root Port 1 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 1. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie2En, "TCSS Thunderbolt PCIE Root Port 2 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 2. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie3En, "TCSS Thunderbolt PCIE Root Port 3 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 3. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssXhciEn, "TCSS USB HOST (xHCI) Enable", &EN_DIS,
Help "Set TCSS XHCI. 0:Disabled 1:Enabled - Must be enabled if xDCI is enabled below"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssXdciEn, "TCSS USB DEVICE (xDCI) Enable", &EN_DIS,
Help "Set TCSS XDCI. 0:Disabled 1:Enabled - xHCI must be enabled if xDCI is enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssDma0En, "TCSS DMA0 Enable", &EN_DIS,
Help "Set TCSS DMA0. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssDma1En, "TCSS DMA1 Enable", &EN_DIS,
Help "Set TCSS DMA1. 0:Disabled 1:Enabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_UsbTcPortEnPreMem, "TCSS USB Port Enable", HEX,
Help "Bitmap for per port enabling"
"Valid range: 0x0 ~ 0x000F"
EndPage
Page "USB-C/Thunderbolt (Post-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_D3HotEnable, "Enable D3 Hot in TCSS ", &EN_DIS,
Help "This policy will enable/disable D3 hot support in IOM"
EditNum $gPlatformFspPkgTokenSpaceGuid_IomTypeCPortPadCfg, "TypeC port GPIO setting", HEX,
Help "GPIO Ping number for Type C Aux Oritation setting, use the GpioPad that is defined in GpioPinsXXXH.h and GpioPinsXXXLp.h as argument.(XXX is platform name, Ex: Adl = AlderLake)"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuUsb3OverCurrentPin, "CPU USB3 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USBC Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_D3ColdEnable, "Enable D3 Cold in TCSS ", &EN_DIS,
Help "This policy will enable/disable D3 cold support in IOM"
Combo $gPlatformFspPkgTokenSpaceGuid_ITbtPcieTunnelingForUsb4, "Enable/Disable PCIe tunneling for USB4", &EN_DIS,
Help "Enable/Disable PCIe tunneling for USB4, default is enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcCstateLimit, "TC State in TCSS ", HEX,
Help "This TC C-State Limit in IOM"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VbtSize, "Intel Graphics VBT (Video BIOS Table) Size", HEX,
Help "Size of Internal Graphics VBT Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_LidStatus, "Platform LID Status for LFP Displays.", &gPlatformFspPkgTokenSpaceGuid_LidStatus,
Help "LFP Display Lid Status (LID_STATUS enum): 0 (Default): LidClosed, 1: LidOpen."
EditNum $gPlatformFspPkgTokenSpaceGuid_IomStayInTCColdSeconds, "Set Iom stay in TC cold seconds in TCSS ", HEX,
Help "Set Iom stay in TC cold seconds in IOM"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IomBeforeEnteringTCColdSeconds, "Set Iom before entering TC cold seconds in TCSS ", HEX,
Help "Set Iom before entering TC cold seconds in IOM"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdEnable, "Enable VMD controller", &EN_DIS,
Help "Enable/disable to VMD controller.0: Disable; 1: Enable(Default)"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdPort, "Map port under VMD", &EN_DIS,
Help "Map/UnMap port under VMD"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdPortDev, "VMD Port Device", DEC,
Help "VMD Root port device number."
"Valid range: 0 ~ 31"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdPortFunc, "VMD Port Func", DEC,
Help "VMD Root port function number."
"Valid range: 0 ~ 7"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarSize, "VMD Config Bar size", DEC,
Help "Set The VMD Config Bar Size."
"Valid range: 20 ~ 28"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr, "VMD Config Bar Attributes", &gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr,
Help "0: VMD_32BIT_NONPREFETCH, 1: VMD_64BIT_NONPREFETCH(Default), 2: VMD_64BIT_PREFETCH"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize1, "VMD Mem Bar1 size", DEC,
Help "Set The VMD Mem Bar1 Size."
"Valid range: 12 ~ 47"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr, "VMD Mem Bar1 Attributes", &gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr,
Help "0: VMD_32BIT_NONPREFETCH(Default), 1: VMD_64BIT_NONPREFETCH, 2: VMD_64BIT_PREFETCH"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize2, "VMD Mem Bar2 size", DEC,
Help "Set The VMD Mem Bar2 Size."
"Valid range: 12 ~ 47"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr, "VMD Mem Bar2 Attributes", &gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr,
Help "0: VMD_32BIT_NONPREFETCH, 1: VMD_64BIT_NONPREFETCH(Default), 2: VMD_64BIT_PREFETCH"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdVariablePtr, "VMD Variable", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBase, "Temporary CfgBar address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Base, "Temporary MemBar1 address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Base, "Temporary MemBar2 address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssCpuUsbPdoProgramming, "TCSS CPU USB PDO Programming", &EN_DIS,
Help "Enable/disable PDO programming for TCSS CPU USB in PEI phase. Disabling will allow for programming during later phase. 1: enable, 0: disable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcPdEnable, "Enable/Disable PMC-PD Solution ", &EN_DIS,
Help "This policy will enable/disable PMC-PD Solution vs EC-TCPC Solution"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssAuxOri, "TCSS Aux Orientation Override Enable", HEX,
Help "Bits 0, 2, ... 10 control override enables, bits 1, 3, ... 11 control overrides"
"Valid range: 0x0 ~ 0x0FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssHslOri, "TCSS HSL Orientation Override Enable", HEX,
Help "Bits 0, 2, ... 10 control override enables, bits 1, 3, ... 11 control overrides"
"Valid range: 0x0 ~ 0x0FFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UsbOverride, "USB override in IOM ", &EN_DIS,
Help "This policy will enable/disable USB Connect override in IOM"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtPcieRootPortEn, "ITBT Root Port Enable", HEX,
Help "ITBT Root Port Enable, 0:Disable, 1:Enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_UsbTcPortEn, "TCSS USB Port Enable", HEX,
Help "Bits 0, 1, ... max Type C port control enables"
"Valid range: 0x0 ~ 0x000F"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtForcePowerOnTimeoutInMs, "ITBTForcePowerOn Timeout value", HEX,
Help "ITBTForcePowerOn value. Specified increment values in miliseconds. Range is 0-1000. 100 = 100 ms."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtConnectTopologyTimeoutInMs, "ITbtConnectTopology Timeout value", HEX,
Help "ITbtConnectTopologyTimeout value. Specified increment values in miliseconds. Range is 0-10000. 100 = 100 ms."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VccSt, "VCCST request for IOM ", &EN_DIS,
Help "This policy will enable/disable VCCST and also decides if message would be replayed in S4/S5"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtDmaLtr, "ITBT DMA LTR", HEX,
Help "TCSS DMA1, DMA2 LTR value"
"Valid range: 0x0 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PtmEnabled, "Enable/Disable PTM", &EN_DIS,
Help "This policy will enable/disable Precision Time Measurement for TCSS PCIe Root Ports"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrEnable, "PCIE RP Ltr Enable", HEX,
Help "Latency Tolerance Reporting Mechanism."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMode, "PCIE RP Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMultiplier, "PCIE RP Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideValue, "PCIE RP Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMode, "PCIE RP Non Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMultiplier, "PCIE RP Non Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideValue, "PCIE RP Non Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpForceLtrOverride, "Force LTR Override", HEX,
Help "Force LTR Override."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrConfigLock, "PCIE RP Ltr Config Lock", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableTcssCovTypeA, "Type C Port x Convert to TypeA", &EN_DIS,
Help "Enable / Disable(default) Type C Port x Convert to TypeA"
EditNum $gPlatformFspPkgTokenSpaceGuid_MappingPchXhciUsbA, "PCH xhci port x for Type C Port x mapping", HEX,
Help "input PCH xhci port x for Type C Port 0 mapping."
"Valid range: 0x0 ~ 0xFF"
EndPage
Page "Security (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_BiosGuard, "BiosGuard", &EN_DIS,
Help "Enable/Disable. 0: Disable, Enable/Disable BIOS Guard feature, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_Txt, "Txt", &EN_DIS,
Help "Enable/Disable. 0: Disable, Enable/Disable Txt feature, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PrmrrSize, "PrmrrSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of PrmrrSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SinitMemorySize, "SinitMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of SinitMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtDprMemoryBase, "TxtDprMemoryBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtDprMemoryBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtHeapMemorySize, "TxtHeapMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtHeapMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtDprMemorySize, "TxtDprMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtDprMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosAcmBase, "BiosAcmBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosAcmSize, "BiosAcmSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ApStartupBase, "ApStartupBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TgaSize, "TgaSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TgaSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtLcpPdBase, "TxtLcpPdBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtLcpPdBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtLcpPdSize, "TxtLcpPdSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtLcpPdSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IsTPMPresence, "IsTPMPresence", HEX,
Help "IsTPMPresence default values"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedSecurityPreMem, "ReservedSecurityPreMem", &EN_DIS,
Help "Reserved for Security Pre-Mem"
EditNum $gPlatformFspPkgTokenSpaceGuid_TotalFlashSize, "TotalFlashSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TotalFlashSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosSize, "BiosSize", HEX,
Help "The size of the BIOS region of the IFWI. Used if FspmUpd->FspmConfig.BiosGuard != 0. If BiosGuard is enabled, MRC will increase the size of the DPR (DMA Protected Range) so that a BIOS Update Script can be stored in the DPR."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SecurityTestRsvd, "SecurityTestRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Test"
EndPage
Page "ME (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_HeciTimeouts, "HECI Timeouts", &EN_DIS,
Help "0: Disable, 1: Enable (Default) timeout check for HECI"
EditNum $gPlatformFspPkgTokenSpaceGuid_Heci1BarAddress, "HECI1 BAR address", HEX,
Help "BAR address of HECI1"
"Valid range: 0x00 ~ 0xFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Heci2BarAddress, "HECI2 BAR address", HEX,
Help "BAR address of HECI2"
"Valid range: 0x00 ~ 0xFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Heci3BarAddress, "HECI3 BAR address", HEX,
Help "BAR address of HECI3"
"Valid range: 0x00 ~ 0xFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DidInitStat, "Force ME DID Init Status", &EN_DIS,
Help "Test, 0: disable, 1: Success, 2: No Memory in Channels, 3: Memory Init Error, Set ME DID init stat value"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableCpuReplacedPolling, "CPU Replaced Polling Disable", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option disables CPU replacement polling loop"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMessageCheck, "Check HECI message before send", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable/Disable message check."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipMbpHob, "Skip MBP HOB", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable/Disable MOB HOB."
Combo $gPlatformFspPkgTokenSpaceGuid_HeciCommunication2, "HECI2 Interface Communication", &EN_DIS,
Help "Test, 0: disable, 1: enable, Adds or Removes HECI2 Device from PCI space."
Combo $gPlatformFspPkgTokenSpaceGuid_KtDeviceEnable, "Enable KT device", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable or Disable KT device."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipCpuReplacementCheck, "Skip CPU replacement check", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option to skip CPU replacement check"
EndPage
Page "ME (Post-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_AmtEnabled, "AMT Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable or disable AMT functionality."
Combo $gPlatformFspPkgTokenSpaceGuid_WatchDogEnabled, "WatchDog Timer Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable or disable WatchDog timer. Setting is invalid if AmtEnabled is 0."
Combo $gPlatformFspPkgTokenSpaceGuid_FwProgress, "PET Progress", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable/Disable PET Events Progress to receive PET Events. Setting is invalid if AmtEnabled is 0."
Combo $gPlatformFspPkgTokenSpaceGuid_AmtSolEnabled, "SOL Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Serial Over Lan enable/disable state by Mebx. Setting is invalid if AmtEnabled is 0."
EditNum $gPlatformFspPkgTokenSpaceGuid_WatchDogTimerOs, "OS Timer", HEX,
Help "16 bits Value, Set OS watchdog timer. Setting is invalid if AmtEnabled is 0."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WatchDogTimerBios, "BIOS Timer", HEX,
Help "16 bits Value, Set BIOS watchdog timer. Setting is invalid if AmtEnabled is 0."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ForcMebxSyncUp, "Force MEBX execution", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Force MEBX execution."
Combo $gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear, "ME Unconfig on RTC clear", &gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear,
Help "0: Disable ME Unconfig On Rtc Clear. <b>1: Enable ME Unconfig On Rtc Clear</b>. 2: Cmos is clear, status unkonwn. 3: Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_EnforceEDebugMode, "Enforce Enhanced Debug Mode", &EN_DIS,
Help "Determine if ME should enter Enhanced Debug Mode. <b>0: disable</b>, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage, "End of Post message", &gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage,
Help "Test, Send End of Post message. Disable(0x0): Disable EOP message, Send in PEI(0x1): EOP send in PEI, Send in DXE(0x2)(Default): EOP send in DXE"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableD0I3SettingForHeci, "D0I3 Setting for HECI Disable", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option disables setting D0I3 bit for all HECI devices"
Combo $gPlatformFspPkgTokenSpaceGuid_MctpBroadcastCycle, "Mctp Broadcast Cycle", &EN_DIS,
Help "Test, Determine if MCTP Broadcast is enabled <b>0: Disable</b>; 1: Enable."
EndPage
Page "Debug"
Combo $gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent, "Platform Debug Consent", &gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent,
Help "Enabled(All Probes+TraceHub) supports all probes with TraceHub enabled and blocks s0ix\n\nEnabled(Low Power) does not support DCI OOB 4-wire and Tracehub is powergated by default, s0ix is viable\n\nManual:user needs to configure Advanced Debug Settings manually, aimed at advanced users"
Combo $gPlatformFspPkgTokenSpaceGuid_DciEn, "DCI Enable", &EN_DIS,
Help "Determine if to enable DCI debug from host"
Combo $gPlatformFspPkgTokenSpaceGuid_DciDbcMode, "DCI DbC Mode", &gPlatformFspPkgTokenSpaceGuid_DciDbcMode,
Help "Disabled: Clear both USB2/3DBCEN; USB2: set USB2DBCEN; USB3: set USB3DBCEN; Both: Set both USB2/3DBCEN; No Change: Comply with HW value"
Combo $gPlatformFspPkgTokenSpaceGuid_DciModphyPg, "Enable DCI ModPHY Power Gate", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg, "USB3 Type-C UFP2DFP Kernel/Platform Debug Support", &gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg,
Help "This BIOS option enables kernel and platform debug for USB3 interface over a UFP Type-C receptacle, select 'No Change' will do nothing to UFP2DFP setting."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber, "UART Number For Debug Purpose", &gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber,
Help "UART number for debug purpose. 0:UART0, 1:UART1, 2:UART2, 3:UART3, 4:UART4, 5:UART5, 6:UART6. Note: If UART0 is selected as CNVi BT Core interface, it cannot be used for debug purpose."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDbg2, "Serial IO UART DBG2 table", HEX,
Help "Enable or disable Serial Io UART DBG2 table, default is Disable; <b>0: Disable;</b> 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable, "Enable/Disable CrashLog", &EN_DIS,
Help "Enable(Default): Enable CPU CrashLog, Disable: Disable CPU CrashLog"
EditNum $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceMemSize, "Memory size per thread allocated for Processor Trace", HEX,
Help "Memory size per thread for Processor Trace. Processor Trace requires 2^N alignment and size in bytes per thread, from 4KB to 128MB.\n<b> 0xff:none </b>, 0:4k, 0x1:8k, 0x2:16k, 0x3:32k, 0x4:64k, 0x5:128k, 0x6:256k, 0x7:512k, 0x8:1M, 0x9:2M, 0xa:4M. 0xb:8M, 0xc:16M, 0xd:32M, 0xe:64M, 0xf:128M"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLpcEnhancePort8xhDecoding, "PCH LPC Enhanced Port 80 Decoding", &EN_DIS,
Help "Original LPC only decodes one byte of port 80h."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPort80Route, "PCH Port80 Route", &gPlatformFspPkgTokenSpaceGuid_PchPort80Route,
Help "Control where the Port 80h cycles are sent, 0: LPC; 1: PCI."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags, "Debug Interfaces", HEX,
Help "Debug Interfaces. BIT0-RAM, BIT1-UART, BIT3-USB3, BIT4-Serial IO, BIT5-TraceHub, BIT2 - Not used."
"Valid range: 0x00 ~ 0x3F"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber, "Serial Io Uart Debug Controller Number", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber,
Help "Select SerialIo Uart Controller for debug. Note: If UART0 is selected as CNVi BT Core interface, it cannot be used for debug purpose."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugAutoFlow, "Serial Io Uart Debug Auto Flow", &EN_DIS,
Help "Enables UART hardware flow control, CTS and RTS lines."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugBaudRate, "Serial Io Uart Debug BaudRate", DEC,
Help "Set default BaudRate Supported from 0 - default to 6000000. Recommended values 9600, 19200, 57600, 115200, 460800, 921600, 1500000, 1843200, 3000000, 3686400, 6000000"
"Valid range: 0 ~ 6000000"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity, "Serial Io Uart Debug Parity", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity,
Help "Set default Parity."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits, "Serial Io Uart Debug Stop Bits", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits,
Help "Set default stop bits."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugDataBits, "Serial Io Uart Debug Data Bits", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0x08"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMmioBase, "Serial Io Uart Debug Mmio Base", HEX,
Help "Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIoUartMode = SerialIoUartPci."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate, "PcdSerialDebugBaudRate", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate,
Help "Baud Rate for Serial Debug Messages. 3:9600, 4:19200, 6:56700, 7:115200."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel, "PcdSerialDebugLevel", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel,
Help "Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
EditNum $gPlatformFspPkgTokenSpaceGuid_PostCodeOutputPort, "Post Code Output Port", HEX,
Help "This option configures Post Code Output Port"
"Valid range: 0x0 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel, "SerialDebugMrcLevel", &gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel,
Help "MRC Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
Combo $gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc, "Ddr4OneDpc", &gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc,
Help "DDR4 1DPC performance feature for 2R DIMMs. Can be enabled on DIMM0 or DIMM1 only, or on both (default)"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lfsr1Mask, "RH pTRR LFSR1 Mask", HEX,
Help "Row Hammer pTRR LFSR1 Mask, 1/2^(value)"
"Valid range: 0x01 ~ 0xF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LpddrRttWr, "LPDDR ODT RttWr", HEX,
Help "Initial RttWr for LP4/5 in Ohms. 0x0 - Auto"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LpddrRttCa, "LPDDR ODT RttCa", HEX,
Help "Initial RttCa for LP4/5 in Ohms. 0x0 - Auto"
"Valid range: 0x00 ~ 0xFF"
EndPage
|
