meta-nuvoton: npcm8xx-igps: update to 03.09.02

Changelog:

IGPS 03.09.02 - Jul 24th 2023
==============

- bootblock 0.3.5
  https://github.com/Nuvoton-Israel/npcm8xx-bootblock/
  releases/tag/A35_BootBlock_0.3.5
  * bug fix: support NO_TIP mode + updated memory map.
    all images are loaded to DRAM. (from version bootblock 0.3.4)
  * Call CLK_ConfigureFIUClock only in PORST
    (update SPI dividers from header).
  * re-enable HOST_IF field in header. Supported values:
    0xFF: do nothing
    0x00: LPC.
    0x01: eSPI
    0x02: GPIOs TRIS.
    0x03: release host wait, disable eSPI
    configuration is done only in PORST.
- add baud rate field to header:
  * Supported values: 9600,14400,19200,38400,57600,115200,230400,
    380400,460800,921600. Default is 115200.
- Update README with signing options.
- Support pkcs11-tool on Linux.
- Bingo 0.0.6.
  https://github.com/Nuvoton-Israel/bingo/releases/tag/Bingo_0.0.6

- update Monitor 1.0.9 (contact Nuvoton for internal users only)
- Optee npcm845x_3.22.0-rc1-7:
  https://github.com/Nuvoton-Israel/optee_os/releases/tag/3.22.0-rc1-7
  * change load address of OPTEE-OS from 0x36000000 to 0x02100000
  * added HUK reading from TIP Mailbox DME PCR0

- TIP_FW 0.6.1 L0 0.5.0 L1:
  * Update RCR regs whenever PORST bit is set in TIP_SCR1
    (ignore all other bits)
  * Export PCI parameters on any reset,
    re-order the parameter locations.
  * Fix typos un uptime and similar.
  * SWRST4 is TIP_RESET.
    ##uboot https://github.com/Nuvoton-Israel/u-boot/
    releases/tag/v2021.04-npcm8xx-20230724
  * u-boot.bin is built with extra config to skip
    UART initialization in u-boot (CONFIG_SYS_SKIP_UART_INIT=y)

- Update bootblock XML:
  * Add host IF field. eSPI in all flavors except Google XML.
  * Add BAUD rate field. default is 115200.

Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ib9d19566ef42d4bbcc3c15df599e396b25e2eede

0 files changed, 0 insertions, 0 deletions