1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
|
#include <loongson.h>
#include <irq.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <asm/irq_cpu.h>
#include <asm/i8259.h>
#include <asm/mipsregs.h>
#include "smp.h"
extern void loongson3_send_irq_by_ipi(int cpu, int irqs);
unsigned int ht_irq[] = {0, 1, 3, 4, 5, 6, 7, 8, 12, 14, 15};
unsigned int local_irq = 1<<0 | 1<<1 | 1<<2 | 1<<7 | 1<<8 | 1<<12;
static void ht_irqdispatch(void)
{
unsigned int i, irq, irq0, irq1;
static unsigned int dest_cpu = 0;
irq = LOONGSON_HT1_INT_VECTOR(0);
LOONGSON_HT1_INT_VECTOR(0) = irq; /* Acknowledge the IRQs */
irq0 = irq & local_irq; /* handled by local core */
irq1 = irq & ~local_irq; /* balanced by other cores */
if (dest_cpu == 0 || !cpu_online(dest_cpu))
irq0 |= irq1;
else
loongson3_send_irq_by_ipi(dest_cpu, irq1);
dest_cpu = dest_cpu + 1;
if (dest_cpu >= num_possible_cpus() || cpu_data[dest_cpu].package > 0)
dest_cpu = 0;
for (i = 0; i < ARRAY_SIZE(ht_irq); i++) {
if (irq0 & (0x1 << ht_irq[i]))
do_IRQ(ht_irq[i]);
}
}
#define UNUSED_IPS (CAUSEF_IP5 | CAUSEF_IP4 | CAUSEF_IP1 | CAUSEF_IP0)
void mach_irq_dispatch(unsigned int pending)
{
if (pending & CAUSEF_IP7)
do_IRQ(LOONGSON_TIMER_IRQ);
#if defined(CONFIG_SMP)
if (pending & CAUSEF_IP6)
loongson3_ipi_interrupt(NULL);
#endif
if (pending & CAUSEF_IP3)
ht_irqdispatch();
if (pending & CAUSEF_IP2)
do_IRQ(LOONGSON_UART_IRQ);
if (pending & UNUSED_IPS) {
pr_err("%s : spurious interrupt\n", __func__);
spurious_interrupt();
}
}
static struct irqaction cascade_irqaction = {
.handler = no_action,
.flags = IRQF_NO_SUSPEND,
.name = "cascade",
};
static inline void mask_loongson_irq(struct irq_data *d)
{
clear_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
irq_disable_hazard();
/* Workaround: UART IRQ may deliver to any core */
if (d->irq == LOONGSON_UART_IRQ) {
int cpu = smp_processor_id();
int node_id = cpu_logical_map(cpu) / loongson_sysconf.cores_per_node;
int core_id = cpu_logical_map(cpu) % loongson_sysconf.cores_per_node;
u64 intenclr_addr = smp_group[node_id] |
(u64)(&LOONGSON_INT_ROUTER_INTENCLR);
u64 introuter_lpc_addr = smp_group[node_id] |
(u64)(&LOONGSON_INT_ROUTER_LPC);
*(volatile u32 *)intenclr_addr = 1 << 10;
*(volatile u8 *)introuter_lpc_addr = 0x10 + (1<<core_id);
}
}
static inline void unmask_loongson_irq(struct irq_data *d)
{
/* Workaround: UART IRQ may deliver to any core */
if (d->irq == LOONGSON_UART_IRQ) {
int cpu = smp_processor_id();
int node_id = cpu_logical_map(cpu) / loongson_sysconf.cores_per_node;
int core_id = cpu_logical_map(cpu) % loongson_sysconf.cores_per_node;
u64 intenset_addr = smp_group[node_id] |
(u64)(&LOONGSON_INT_ROUTER_INTENSET);
u64 introuter_lpc_addr = smp_group[node_id] |
(u64)(&LOONGSON_INT_ROUTER_LPC);
*(volatile u32 *)intenset_addr = 1 << 10;
*(volatile u8 *)introuter_lpc_addr = 0x10 + (1<<core_id);
}
set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
irq_enable_hazard();
}
/* For MIPS IRQs which shared by all cores */
static struct irq_chip loongson_irq_chip = {
.name = "Loongson",
.irq_ack = mask_loongson_irq,
.irq_mask = mask_loongson_irq,
.irq_mask_ack = mask_loongson_irq,
.irq_unmask = unmask_loongson_irq,
.irq_eoi = unmask_loongson_irq,
};
void irq_router_init(void)
{
int i;
/* route LPC int to cpu core0 int 0 */
LOONGSON_INT_ROUTER_LPC =
LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 0);
/* route HT1 int0 ~ int7 to cpu core0 INT1*/
for (i = 0; i < 8; i++)
LOONGSON_INT_ROUTER_HT1(i) =
LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 1);
/* enable HT1 interrupt */
LOONGSON_HT1_INTN_EN(0) = 0xffffffff;
/* enable router interrupt intenset */
LOONGSON_INT_ROUTER_INTENSET =
LOONGSON_INT_ROUTER_INTEN | (0xffff << 16) | 0x1 << 10;
}
void __init mach_init_irq(void)
{
clear_c0_status(ST0_IM | ST0_BEV);
irq_router_init();
mips_cpu_irq_init();
init_i8259_irqs();
irq_set_chip_and_handler(LOONGSON_UART_IRQ,
&loongson_irq_chip, handle_level_irq);
/* setup HT1 irq */
setup_irq(LOONGSON_HT1_IRQ, &cascade_irqaction);
set_c0_status(STATUSF_IP2 | STATUSF_IP6);
}
#ifdef CONFIG_HOTPLUG_CPU
void fixup_irqs(void)
{
irq_cpu_offline();
clear_c0_status(ST0_IM);
}
#endif
|
