blob: adc6b76fcb3a54d43da5d3e9eef41459a5b87713 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
|
* Freescale i.MX Watchdog Timer (WDT) Controller
Required properties:
- compatible : Should be "fsl,<soc>-wdt"
- reg : Should contain WDT registers location and length
- interrupts : Should contain WDT interrupt
Optional properties:
- big-endian: If present the watchdog device's registers are implemented
in big endian mode, otherwise in native mode(same with CPU), for more
detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
- fsl,ext-reset-output: If present the watchdog device is configured to
assert its external reset (WDOG_B) instead of issuing a software reset.
- timeout-sec : Contains the watchdog timeout in seconds
Examples:
wdt@73f98000 {
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f98000 0x4000>;
interrupts = <58>;
big-endian;
timeout-sec = <20>;
};
|