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path: root/include/asm-x86/cpufeature.h
AgeCommit message (Expand)AuthorFilesLines
2008-09-23x86: prevent C-states hang on AMD C1E enabled machinesThomas Gleixner1-0/+1
2008-09-06x86: add NOPL as a synthetic CPU feature bitH. Peter Anvin1-5/+6
2008-08-25x86: add X86_FEATURE_XMM4_2 definitionsAustin Zhang1-0/+2
2008-07-18x86: APIC: remove apic_write_around(); use alternativesMaciej W. Rozycki1-0/+1
2008-07-11x86_64: add pseudo-features for 32-bit compat syscallJeremy Fitzhardinge1-2/+2
2008-07-08Merge branches 'x86/mmio', 'x86/delay', 'x86/idle', 'x86/oprofile', 'x86/debu...Ingo Molnar1-0/+1
2008-06-24x86: add X86_FEATURE_IBS cpu featureRobert Richter1-0/+1
2008-05-25x86: setup_force_cpu_cap(): don't do clear_bit(non-unsigned-long)Andrew Morton1-2/+2
2008-04-17x86: PAT infrastructure patchvenkatesh.pallipadi@intel.com1-0/+1
2008-04-17x86: add cpu_has_arch_perfmonstephane eranian1-0/+1
2008-04-17x86: clean up cpu capabilities accessesIngo Molnar1-1/+5
2008-02-04x86: add feature macros for the gbpages cpuid bitAndi Kleen1-0/+2
2008-02-04x86: unify CPU feature string namesH. Peter Anvin1-3/+9
2008-01-30x86: convert TSC disabling to generic cpuid disable bitmapAndi Kleen1-0/+4
2008-01-30x86: add framework to disable CPUID bits on the command lineAndi Kleen1-0/+4
2008-01-30x86: 64-bit, remove redundant cpu_has_ definitionsKyle McMartin1-15/+0
2008-01-30x86: remove the now unused X86_FEATURE_SYNC_RDTSCAndi Kleen1-1/+1
2008-01-30x86: Implement support to synchronize RDTSC with LFENCE on Intel CPUsAndi Kleen1-0/+1
2008-01-30x86: implement support to synchronize RDTSC through MFENCE on AMD CPUsAndi Kleen1-0/+1
2008-01-30x86: x86-64 wired cpu_has macrosRoland McGrath1-0/+12
2008-01-30x86: add set/clear_cpu_cap operationsJeremy Fitzhardinge1-1/+4
2008-01-30x86: clean up bitops-related warningsJeremy Fitzhardinge1-1/+1
2008-01-30x86: cleanup tlbflush.h variantsThomas Gleixner1-0/+9
2008-01-30x86: unify asm/cpufeature.hH. Peter Anvin1-4/+187
2007-10-11i386/x86_64: move headers to include/asm-x86Thomas Gleixner1-0/+5
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