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2012-03-22drm/nouveau: bump version to 1.0.0Ben Skeggs1-4/+4
2012-03-22drm/nvd0/disp: ignore clock set if no pclkBen Skeggs1-1/+3
2012-03-22drm/nouveau: oops, increase channel dispc_vma to 4Ben Skeggs1-1/+1
2012-03-22drm/nouveau: inform userspace of new kernel subchannel requirementsBen Skeggs2-13/+6
2012-03-22drm/nouveau: remove m2mf creation on userspace channelsBen Skeggs4-81/+93
2012-03-22drm/nvc0-/disp: reimplement flip completion method as fifo methodBen Skeggs4-18/+42
2012-03-22drm/nouveau: move fence sequence check to start of loopBen Skeggs1-6/+5
2012-03-22drm/nouveau: remove subchannel names from places where it doesn't matterBen Skeggs4-25/+38
2012-03-22drm/nouveau/ttm: always do buffer moves on kernel channelBen Skeggs3-19/+4
2012-03-13drm/nouveau: map first page of mmio early and determine chipset earlierBen Skeggs2-63/+62
2012-03-13drm/nvd0/disp: disconnect encoders before reprogramming themBen Skeggs1-33/+33
2012-03-13drm/nvd0/disp: move syncs/magic setup to or mode_setBen Skeggs1-20/+39
2012-03-13drm/nouveau/dp: account for channel coding overhead in link trainingBen Skeggs1-0/+3
2012-03-13drm/nvd0/disp: fix dcb sor link matching in supervisor handlerBen Skeggs1-8/+9
2012-03-13drm/nvd0/disp: initial implementation of displayportBen Skeggs2-4/+171
2012-03-13drm/nouveau/dp: make dp dpms function common, call from sor code insteadBen Skeggs3-22/+31
2012-03-13drm/nv50/hwsq: some nv92 fixesMartin Peres1-2/+3
2012-03-13drm/nouveau/dp: move all nv50/sor-specific code out of nouveau_dp.cBen Skeggs5-228/+231
2012-03-13drm/nouveau/dp: make functions for executing various bios tablesBen Skeggs1-9/+46
2012-03-13drm/nouveau/pm: fix oops if chipset has no pm support at allBen Skeggs1-3/+5
2012-03-13drm/nouveau/bios: rework vbios shadowingBen Skeggs2-121/+158
2012-03-13drm/nouveau/bios: attempt acpi rom fetch before pciromBen Skeggs1-1/+1
2012-03-13drm/nvd0/disp: attempt to handle more than 2 crtcs if possibleBen Skeggs1-19/+14
2012-03-13drm/nvc0/vram: get part count from PUNITSBen Skeggs1-16/+14
2012-03-13drm/nv40/pm: fix fanspeed regressionBen Skeggs1-0/+4
2012-03-13drm/nouveau/pm: several fixes for nvc0 memory timingsRoy Spliet1-3/+6
2012-03-13drm/nvc0/pm: restrict pll mode to clocks that can actually use itBen Skeggs1-1/+1
2012-03-13drm/nouveau/dp: fix bad comparison in dp_link_train_commit()Xi Wang1-1/+1
2012-03-13drm/nouveau/mxm: call mxmi to determine revision before calling mxmsBen Skeggs1-1/+38
2012-03-13drm/nouveau/pm: init only after display subsystem has been createdBen Skeggs1-7/+5
2012-03-13drm/nvc0/fb: detect presense of second rankBen Skeggs1-0/+1
2012-03-13drm/nv50/display: expose color vibrance controlChristoph Bumiller6-3/+85
2012-03-13drm/nv50-nvc0/vm: support unsnooped system memoryBen Skeggs3-17/+17
2012-03-13drm/nouveau: recognise DCB connector type for DP+DVI+VGA DMS-59Ben Skeggs2-1/+7
2012-03-13drm/nouveau/mem: handle dll_off for ddr2/ddr3Ben Skeggs1-11/+23
2012-03-13drm/nouveau/pm: extend profile interface for destroy/init/finiBen Skeggs2-0/+25
2012-03-13drm/nouveau/pm: rework to allow selecting separate profiles for ac/batteryBen Skeggs4-46/+120
2012-03-13drm/nouveau/pm: fix dll off -> dll on transitionsBen Skeggs1-2/+7
2012-03-13drm/nouveau/pm: detect when we need dll disabled for gddr3Ben Skeggs3-1/+12
2012-03-13drm/nv50: fix detection of second vram rankBen Skeggs1-1/+1
2012-03-13drm/nouveau/pm: track mr2 for gddr3Ben Skeggs1-1/+4
2012-03-13drm/nv50/pm: wait for all fifo-connected engines to idle before reclockingMartin Peres1-0/+2
2012-03-13drm/nv50/pm: use hwsq for engine reclocking tooBen Skeggs1-87/+98
2012-03-13drm/nv50/disp: more accurate function to determine active crtcsBen Skeggs3-8/+28
2012-03-13drm/nv50/pm: initial work towards proper memory reclocking, with timingsBen Skeggs1-46/+154
2012-03-13drm/nouveau/pm: introduce ram reclocking helperBen Skeggs2-0/+114
2012-03-13drm/nouveau/pm: embed timings into perflvl structsBen Skeggs4-58/+54
2012-03-13drm/nouveau/pm: calculate memory timings at perflvl creation timeBen Skeggs5-298/+132
2012-03-13drm/nouveau/pm: readback boot perflvl *before* parsing vbiosBen Skeggs1-11/+19
2012-03-13drm/nouveau/pm: implement DDR2/DDR3/GDDR3/GDDR5 MR generation and validationRoy Spliet4-152/+476