summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Expand)AuthorFilesLines
2014-01-08clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker1-5/+20
2014-01-08clk: exynos-audss: convert to platform deviceAndrew Bresticker1-16/+88
2014-01-08clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-47/+34
2014-01-08clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-339/+309
2014-01-08clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-295/+264
2014-01-08clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-455/+402
2014-01-08clk: exynos5250: register APLL rate tableAndrew Bresticker1-1/+24
2013-12-30clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat1-1/+2
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa1-3/+5
2013-12-30clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa1-3/+3
2013-12-30clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa1-4/+12
2013-12-30clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa1-6/+8
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa1-8/+17
2013-12-30clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa1-122/+123
2013-12-30clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa1-102/+188
2013-12-30Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa3-11/+15
2013-12-30clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski1-5/+5
2013-12-30clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan1-1/+2
2013-12-30clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan1-1/+4
2013-12-30clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan1-1/+1
2013-12-30clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker1-2/+2
2013-12-30clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim1-1/+1
2013-12-28clk: remove CONFIG_COMMON_CLK_DEBUGMike Turquette2-11/+1
2013-12-27clk: max77686: Remove redundant breakSachin Kamat1-2/+0
2013-12-23clk: add accuracy support for fixed clockBoris BREZILLON1-6/+37
2013-12-23clk: add clk accuracy retrieval supportBoris BREZILLON1-7/+93
2013-12-23clk: si570: Remove redundant of_match_ptr helperSachin Kamat1-1/+1
2013-12-23Merge tag 'renesas-clock-for-v3.14' of git://git.kernel.org/pub/scm/linux/ker...Mike Turquette2-1/+105
2013-12-21Merge tag 'mvebu-clk-3.14' of git://git.infradead.org/linux-mvebu into clk-nextMike Turquette3-0/+229
2013-12-20clk/zynq/clkc: Add 'fclk-enable' featureSoren Brinkmann1-3/+15
2013-12-20clk: ux500: Remove extra semicolonSachin Kamat1-1/+1
2013-12-20clk: vt8500: Staticize vtwm_pll_opsSachin Kamat1-1/+1
2013-12-20clk: mvebu: Staticize of_cpu_clk_setupSachin Kamat1-1/+1
2013-12-20clk: versatile: Staticize clk_sp810_timerclken_of_getSachin Kamat1-1/+1
2013-12-20clk: socfpga: Use NULL instead of 0Sachin Kamat1-1/+1
2013-12-20clk: tegra: Staticize tegra_clk_periph_nodiv_opsSachin Kamat1-1/+1
2013-12-20clk: tegra: Staticize local variables in clk-pll.cSachin Kamat1-6/+6
2013-12-19clk: SPEAr: Staticize clk_frac_opsSachin Kamat1-1/+1
2013-12-15clk: si570: Add a driver for SI570 oscillatorsSoren Brinkmann3-0/+542
2013-12-15clk: Fix debugfs reparenting NULL pointer dereferenceStephen Boyd1-2/+1
2013-12-14clk: emev2: Add support for emev2 SMU clocks with DTTakashi Yoshii2-1/+105
2013-12-13Merge tag 'clk-hisilicon' of git://git.kernel.org/pub/scm/linux/kernel/git/hz...Mike Turquette6-0/+652
2013-12-13Merge branch 'clk-next-shmobile' into clk-nextMike Turquette5-0/+720
2013-12-13clk: shmobile: Add MSTP clock supportLaurent Pinchart2-0/+230
2013-12-13clk: shmobile: Add DIV6 clock supportLaurent Pinchart2-0/+186
2013-12-13clk: shmobile: Add R-Car Gen2 clocks supportLaurent Pinchart3-0/+304
2013-12-11clk: hi3620: add gate clock flagHaojian Zhuang1-59/+59
2013-12-11clk: hi3620: fix wrong flags on dividerHaojian Zhuang1-11/+11
2013-12-04clk: exynos5420: fix cpll clock register offsetsChander Kashyap1-2/+2
2013-12-04clk: hisilicon: add common clock supportHaojian Zhuang6-0/+652