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BMC/Intel-BMC/linux.git
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dev-4.13
dev-4.17
dev-4.18
dev-4.19
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dev-4.4
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dev-5.10.46-intel
dev-5.10.49-intel
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dev-5.15-intel
dev-5.2
dev-5.3
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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
phy
/
cadence
Age
Commit message (
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)
Author
Files
Lines
2020-09-18
phy: cadence-torrent: Add USB + SGMII/QSGMII multilink configuration
Swapnil Jakhade
1
-0
/
+254
2020-09-18
phy: cadence-torrent: Add PCIe + USB multilink configuration
Swapnil Jakhade
1
-0
/
+216
2020-09-18
phy: cadence-torrent: Add single link USB register sequences
Swapnil Jakhade
1
-1
/
+259
2020-09-18
phy: cadence-torrent: Add single link SGMII/QSGMII register sequences
Swapnil Jakhade
1
-0
/
+89
2020-09-18
phy: cadence-torrent: Configure PHY_PLL_CFG as part of link_cmn_vals
Swapnil Jakhade
1
-4
/
+18
2020-09-18
phy: cadence-torrent: Add PHY link configuration sequences for single link
Swapnil Jakhade
1
-0
/
+44
2020-09-18
phy: cadence-torrent: Add clk changes for multilink configuration
Swapnil Jakhade
1
-24
/
+17
2020-09-18
phy: cadence-torrent: Update PHY reset for multilink configuration
Swapnil Jakhade
1
-7
/
+21
2020-09-18
phy: cadence-torrent: Add support for PHY multilink configuration
Swapnil Jakhade
1
-26
/
+757
2020-09-18
phy: cadence-torrent: Add PHY APB reset support
Swapnil Jakhade
1
-0
/
+13
2020-09-18
phy: cadence-torrent: Check cmn_ready assertion during PHY power on
Swapnil Jakhade
1
-1
/
+30
2020-09-18
phy: cadence-torrent: Add single link PCIe support
Swapnil Jakhade
1
-30
/
+266
2020-09-18
phy: cadence-torrent: Check total lane count for all subnodes is within limit
Swapnil Jakhade
1
-4
/
+15
2020-09-18
phy: cadence-torrent: Add separate regmap functions for torrent and DP
Swapnil Jakhade
1
-33
/
+66
2020-09-18
phy: cadence-torrent: Enable support for multiple subnodes
Swapnil Jakhade
1
-15
/
+0
2020-09-18
phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addresses
Swapnil Jakhade
1
-6
/
+2
2020-09-18
phy: cadence-torrent: Use of_device_get_match_data() to get driver data
Swapnil Jakhade
1
-8
/
+5
2020-09-16
phy: cadence: torrent: Constify regmap_config structs
Rikard Falkeborn
1
-6
/
+6
2020-09-16
phy: cadence: salvo: Constify cdns_nxp_sequence_pair
Rikard Falkeborn
1
-3
/
+3
2020-09-16
phy: cadence: Sierra: Constify static structs
Rikard Falkeborn
1
-12
/
+12
2020-09-16
Merge branch 'topic/phy_attrs' into next
Vinod Koul
1
-0
/
+4
2020-09-16
phy: cadence-torrent: Set Torrent PHY attributes
Swapnil Jakhade
1
-0
/
+4
2020-08-31
phy: cadence: salvo: Constify cdns_salvo_phy_ops
Rikard Falkeborn
1
-1
/
+1
2020-07-13
phy: cadence: salvo: fix wrong bit definition
Peter Chen
1
-1
/
+1
2020-05-18
phy: cadence: sierra: Fix for USB3 U1/U2 state
Sanket Parmar
1
-13
/
+14
2020-05-15
phy: phy-cadence-salvo: add phy .init API
Peter Chen
1
-1
/
+11
2020-05-07
phy: cadence: salvo: add salvo phy driver
Peter Chen
3
-0
/
+325
2020-03-20
phy: cadence-torrent: Add support for subnode bindings
Swapnil Jakhade
1
-75
/
+217
2020-03-20
phy: cadence-torrent: Add platform dependent initialization structure
Swapnil Jakhade
1
-0
/
+9
2020-03-20
phy: cadence-torrent: Use regmap to read and write DPTX PHY registers
Swapnil Jakhade
1
-69
/
+100
2020-03-20
phy: cadence-torrent: Use regmap to read and write Torrent PHY registers
Swapnil Jakhade
1
-369
/
+650
2020-03-20
phy: cadence-torrent: Implement PHY configure APIs
Swapnil Jakhade
1
-5
/
+431
2020-03-20
phy: cadence-torrent: Add 19.2 MHz reference clock support
Swapnil Jakhade
1
-17
/
+441
2020-03-20
phy: cadence-torrent: Refactor code for reusability
Swapnil Jakhade
1
-93
/
+137
2020-03-20
phy: cadence-torrent: Add wrapper for DPTX register access
Swapnil Jakhade
1
-21
/
+50
2020-03-20
phy: cadence-torrent: Add wrapper for PHY register access
Swapnil Jakhade
1
-65
/
+77
2020-03-20
phy: cadence-torrent: Adopt Torrent nomenclature
Swapnil Jakhade
1
-53
/
+58
2020-03-20
phy: cadence-dp: Rename to phy-cadence-torrent
Yuti Amonkar
3
-5
/
+5
2020-01-14
phy: cadence: Sierra: add phy_reset hook
Roger Quadros
1
-0
/
+10
2020-01-14
phy: cadence: Sierra: remove redundant initialization of pointer regmap
Colin Ian King
1
-1
/
+1
2020-01-08
phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove()
Kishon Vijay Abraham I
1
-1
/
+1
2020-01-08
phy: cadence: Sierra: Set cmn_refclk_dig_div/cmn_refclk1_dig_div frequency to...
Kishon Vijay Abraham I
1
-0
/
+21
2020-01-08
phy: cadence: Sierra: Change MAX_LANES of Sierra to 16
Kishon Vijay Abraham I
1
-1
/
+21
2020-01-08
phy: cadence: Sierra: Check for PLL lock during PHY power on
Kishon Vijay Abraham I
1
-1
/
+32
2020-01-08
phy: cadence: Sierra: Get reset control "array" for each link
Kishon Vijay Abraham I
1
-1
/
+1
2020-01-08
phy: cadence: Sierra: Configure both lane cdb and common cdb registers for ex...
Anil Varughese
1
-96
/
+254
2020-01-08
phy: cadence: Sierra: Modify register macro names to be in sync with Sierra u...
Kishon Vijay Abraham I
1
-83
/
+84
2020-01-08
phy: cadence: Sierra: Make cdns_sierra_phy_init() as phy_ops
Kishon Vijay Abraham I
1
-6
/
+9
2020-01-08
phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoC
Kishon Vijay Abraham I
1
-0
/
+14
2020-01-08
phy: cadence: Sierra: Use "regmap" for read and write to Sierra registers
Kishon Vijay Abraham I
1
-54
/
+237
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