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path: root/drivers/mmc/host/sunxi-mmc.c
AgeCommit message (Expand)AuthorFilesLines
2017-08-30mmc: sunxi: Reset the device at probe timeMaxime Ripard1-1/+1
2017-08-30mmc: sunxi: Fix clock rate passed to sunxi_mmc_clk_set_phaseChen-Yu Tsai1-1/+5
2017-08-30mmc: sunxi: fix support for new timings mode only SoCsIcenowy Zheng1-1/+1
2017-08-30mmc: sunxi: Fix NULL pointer reference on clk_delaysChen-Yu Tsai1-0/+5
2017-08-30mmc: sunxi: Add support for A83T eMMC (MMC2)Chen-Yu Tsai1-0/+8
2017-08-30mmc: sunxi: Support MMC DDR52 transfer mode with new timing modeChen-Yu Tsai1-12/+18
2017-08-30mmc: sunxi: Support controllers that can use both old and new timingsChen-Yu Tsai1-2/+43
2017-08-30mmc: sunxi: constify mmc_host_ops structuresJulia Lawall1-1/+1
2017-08-30mmc: sunxi: explicitly request exclusive reset controlPhilipp Zabel1-1/+2
2017-07-17mmc: sunxi: Keep default timing phase settings for new timing modeChen-Yu Tsai1-2/+6
2017-04-24mmc: use new core function mmc_get_dma_dirHeiner Kallweit1-11/+3
2017-04-24mmc: sunxi: change controller error info to debug levelIcenowy Zheng1-1/+1
2017-02-13mmc: sunxi: Add more debug informationsMaxime Ripard1-4/+19
2017-02-13mmc: sunxi: Add EMMC (MMC2) controller compatibleMaxime Ripard1-0/+8
2017-02-13mmc: sunxi: Mask DATA0 when updating the clockMaxime Ripard1-1/+13
2017-02-13mmc: sunxi: Enable the new timings for the A64 MMC controllersMaxime Ripard1-0/+6
2017-02-13mmc: sunxi: Always set signal delay to 0 for A64Maxime Ripard1-33/+17
2017-02-13mmc: sunxi: Gate the clock when rate is 0Maxime Ripard1-1/+4
2017-02-13mmc: sunxi: Fix clock frequency change sequenceMaxime Ripard1-4/+4
2016-11-29mmc: sunxi: Prevent against null dereference for vmmcMaxime Ripard1-5/+10
2016-09-26mmc: sunxi: add support for A64 mmc controllerIcenowy Zheng1-0/+79
2016-09-26mmc: sunxi-mmc: change idma descriptor to __le32Michael Weiser1-12/+15
2016-09-26mmc: sunxi: Check the value returned by clk_round_rateJean-Francois Moine1-3/+9
2016-09-26mmc: sunxi: sun4i / sun5i do not have sample clocksHans de Goede1-11/+24
2016-09-26mmc: sunxi: Factor out clock phase setting code into a helper functionHans de Goede1-28/+33
2016-09-26mmc: sunxi: Introduce a sunxi_mmc_cfg structHans de Goede1-32/+45
2016-09-26mmc: sunxi: Disable sample clks on removeHans de Goede1-0/+2
2016-06-02mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80Chen-Yu Tsai1-5/+0
2016-06-02mmc: sunxi: Fix DDR MMC timings for A80Chen-Yu Tsai1-2/+2
2016-04-28mmc: sunxi: Disable eMMC HS-DDR (MMC_CAP_1_8V_DDR) for Allwinner A80Chen-Yu Tsai1-0/+5
2016-02-29mmc: sunxi-mmc: remove the MMC_DATA_STREAM flagJaehoon Chung1-5/+0
2016-02-29mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) supportChen-Yu Tsai1-0/+1
2016-02-29mmc: sunxi: Support 8 bit eMMC DDR transfer modesChen-Yu Tsai1-7/+26
2016-02-29mmc: sunxi: Support MMC_DDR52 timing modesChen-Yu Tsai1-5/+7
2016-02-29mmc: sunxi: Support vqmmc regulatorChen-Yu Tsai1-0/+31
2016-02-29mmc: sunxi: Return error on mmc_regulator_set_ocr() fail in .set_ios opChen-Yu Tsai1-1/+4
2016-02-29mmc: sunxi: Document host init sequenceChen-Yu Tsai1-0/+12
2015-10-26mmc: sunxi: Add card busy detectionHans de Goede1-0/+8
2015-09-29mmc: sunxi: Fix clk-delay settingsHans de Goede1-14/+39
2015-08-27mmc: sunxi: fix timeout in sunxi_mmc_oclk_onoffMichal Suchanek1-1/+1
2015-03-23mmc: sunxi: add MMC_CAP_SDIO_IRQ capabilityHans de Goede1-1/+1
2015-03-23mmc: sunxi: avoid invalid pointer calculationArnd Bergmann1-2/+3
2015-03-23mmc: sunxi: Use devm_reset_control_get_optional() for reset controlChen-Yu Tsai1-1/+3
2015-02-21Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds1-15/+48
2015-01-19mmc: sunxi: Removing unused codeDavid Lanzendörfer1-9/+1
2015-01-19mmc: sunxi: Correcting SDXC_HARDWARE_RESET bitDavid Lanzendörfer1-1/+1
2015-01-19mmc: sunxi: Lock fixDavid Lanzendörfer1-1/+12
2015-01-19mmc: sunxi: Fix setup of last descriptor of dma transferHans de Goede1-1/+3
2015-01-14mmc: sunxi: Convert MMC driver to the standard clock phase APIMaxime Ripard1-24/+49
2014-11-10mmc: sunxi: Remove unused includes of linux/clk-private.hTomeu Vizoso1-1/+0