| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-06-01 | irqchip/gic: Split vGIC probing information from the GIC code | Marc Zyngier | 1 | -2/+0 |
| 2019-08-20 | irqchip/gic: Prepare for more than 16 PPIs | Marc Zyngier | 1 | -1/+1 |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner | 1 | -12/+1 |
| 2018-12-13 | irqchip/gic: Add support to device tree based quirks | Srinivas Kandagatla | 1 | -0/+3 |
| 2017-10-19 | irqchip/gic: Make quirks matching conditional on init return value | Ard Biesheuvel | 1 | -1/+1 |
| 2016-05-03 | irqchip/gic-v2: Parse and export virtual GIC information | Julien Grall | 1 | -0/+3 |
| 2015-09-29 | irqchip/gicv3-its: Add HW revision detection and configuration | Robert Richter | 1 | -0/+9 |
| 2015-01-26 | irqchip: gic: Allow interrupt level to be set for PPIs | Liviu Dudau | 1 | -1/+1 |
| 2014-07-09 | irqchip: gic: Move some bits of GICv2 to a library-type file | Marc Zyngier | 1 | -0/+29 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |