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path: root/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c
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2021-02-11drm/nouveau/clk: switch to instanced constructorBen Skeggs1-9/+7
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2016-07-14drm/nouveau/clk/gm20b: add glitchless and DFS supportAlexandre Courbot1-85/+4
This patch adds support for advanced features supported by the Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be updated without disabling the PLL first if the SYNC_MODE bit of the CFG register is set. More significantly, DFS allows the PLL to monitor the actual input voltage and to dynamically lower the output frequency accordingly. This allows the clock to be more tolerant of lower voltages. These improvements are only supported for Tegra speedos >= 1. Also add the voltage table that is suitable for GM20B's NAPLL. This change needs to be done atomically for the right voltages to be used by the clock driver. v2. Fix build on non-Tegra platforms Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: rename constructorAlexandre Courbot1-2/+2
Strip the _ prefix off the gk20a clock constructor. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: improve MNP programmingAlexandre Courbot1-89/+96
Split the MNP programming function into two functions for the cases where we allow sliding or not, instead of making it take a parameter for this. This results in less conditionals in the code and makes it easier to read. Also make the MNP programming functions take the PLL parameters as arguments, and move bits of code to more relevant places (previous programming tended to be just-in-time, which added more conditionnals in the code). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: factorize n_lo computation codeAlexandre Courbot1-9/+10
Use a dedicated function instead of always calculating n_lo on the fly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: parameterize PLL settingsAlexandre Courbot1-24/+27
Make functions manipulating PLL settings take them as an argument, instead of assuming we want to work on the copy in the gk20a_clk structure. This makes these functions more flexible, which we will need in GM20B. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: add and use MNP programming functionsAlexandre Courbot1-13/+22
Add relevant functions to work with the gk20a_pll structure and use them where they ought to be instead of directly manipulating registers. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: use nvkm_ functions in slide()Alexandre Courbot1-16/+10
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: reorganize MNP calculation a bitAlexandre Courbot1-8/+5
Move variables declarations to their actual scope of use, and simplify code a bit. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: setup slide once during initAlexandre Courbot1-6/+40
Slide setup needs to be performed only once, during init. Also use the proper parameters for different clock speeds. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14drm/nouveau/clk/gk20a: properly protect macro argumentAlexandre Courbot1-1/+1
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: share reusable structures/functionsAlexandre Courbot1-36/+8
Make functions/structures that the GM20B driver will reuse public. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: set lowest frequency during init()Alexandre Courbot1-2/+5
Err on the safe side by setting the lowest frequency (and thus voltage) during device init. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: split gk20a_clk_new()Alexandre Courbot1-12/+31
This allows to instanciate drivers that use the same logic as gk20a with different parameters. Add a constructor function to allow other chips that inherit from this clock to easily initialize its members Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: abstract pl_to_divAlexandre Courbot1-21/+36
pl_to_div may be done differently depending on the chip. Abstract this operation so the same logic can be reused for them as well. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: put mnp values into their own structAlexandre Courbot1-31/+36
This allows us to read them using one single function and will be handy to the GM20B driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: emit parent rate as debug messageAlexandre Courbot1-2/+2
Most users are probably not interested in this information. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: only restore divider to 1:1 if neededAlexandre Courbot1-3/+10
Only restore the 1:1 divider if it is not set already. Also use the proper masks for this operation and add a second write as done in the Android code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: only compute n_lo if neededAlexandre Courbot1-3/+5
n_lo is used if we are going to slide. Compute it only if that condition succeeds to avoid confusion about future usage of this computation. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: fix VCO bit maskAlexandre Courbot1-1/+2
Fix the mask specified to switch to VCO mode was given as an (incorrect) immediate value. Although the side-effect happens to be the same, this is clearly incorrect. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: rename enable/disable functionsAlexandre Courbot1-28/+24
gk20a_pllg_disable() is only used in the context of gk20a_clk_fini(). Move its body there and rename _gk20a_pllg_enable() and _gk20a_pllg_disable() to non-underscored versions. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: reorganize variables in gk20a_pllg_calc_mnp()Alexandre Courbot1-4/+8
Move some variables declarations to the scope where they are actually used to make the code easier to follow. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14drm/nouveau/clk/gk20a: convert parameters to KhzAlexandre Courbot1-15/+17
Perform computations in Khz instead of Mhz for better precision. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-16nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usageNicolas Pitre1-2/+1
do_div() must only be used with a u64 dividend. Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-08-28drm/nouveau/tegra: merge platform setup from nouveau drmBen Skeggs1-5/+3
The copyright header in nvkm/engine/device/platform.c has been replaced with the NVIDIA one from drm/nouveau_platform.c, as most of the actual code is now theirs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28drm/nouveau/clk: convert to new-style nvkm_subdevBen Skeggs1-63/+42
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28drm/nouveau/platform: remove subclassing of nvkm_deviceBen Skeggs1-3/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28drm/nouveau/clk: switch to subdev printk macrosBen Skeggs1-16/+24
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28drm/nouveau/clk: switch to new-style timer macrosBen Skeggs1-4/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28drm/nouveau/clk: switch to device pri macrosBen Skeggs1-35/+43
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28drm/nouveau/clk: cosmetic changesBen Skeggs1-126/+126
This is purely preparation for upcoming commits, there should be no code changes here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28drm/nouveau/device: include core/device.h automatically for subdevs/enginesBen Skeggs1-2/+0
Pretty much every subdev/engine is going to need access to nvkm_device shortly to touch registers and/or output messages. The odd placement of the includes is necessary to work around some inter-dependencies that currently exist. This will be fixed later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22drm/nouveau/timer: namespace + nvidia gpu names (no binary change)Ben Skeggs1-0/+2
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22drm/nouveau/clk: namespace + nvidia gpu names (no binary change)Ben Skeggs1-30/+28
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22drm/nouveau/clk: rename from clock (no binary change)Ben Skeggs1-0/+680
Rename to match the Linux subsystem responsible for the same kind of things. Will be investigating how feasible it will be to expose the GPU clock trees with it at some point. The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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