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path: root/drivers/gpu/drm/nouveau/nouveau_state.c
AgeCommit message (Expand)AuthorFilesLines
2011-03-23nouveau: change the backlight parent device to the connector, not the PCI devMatthew Garrett1-6/+0
2011-02-24drm/nouveau: remove no_vm/mappable flags from nouveau_boBen Skeggs1-34/+0
2011-02-24drm/nvc0: support for sw methods + enable page flippingBen Skeggs1-1/+1
2011-02-24drm/nv50: enable page flippingBen Skeggs1-1/+1
2011-02-24drm/nouveau: use system_wq instead of dev_priv->wqTejun Heo1-9/+1
2011-02-07drm: rework PCI/platform driver interface.Dave Airlie1-2/+2
2011-01-05drm/switcheroo: track state of switch in drivers.Dave Airlie1-0/+4
2011-01-05vga_switcheroo: add reprobe hook for fbcon to recheck connected outputs.Dave Airlie1-0/+7
2011-01-05drm/nouveau: add delayed switch complete callback.Dave Airlie1-0/+1
2010-12-21drm/nvc0: skip dma object creation for drm channelBen Skeggs1-0/+5
2010-12-21drm/nvc0: initial vm implementation, use for bar1/bar3 managementBen Skeggs1-7/+9
2010-12-08drm/nouveau: kick vram functions out into an "engine"Ben Skeggs1-0/+16
2010-12-08drm/nouveau: introduce a util function to wait on reg != valBen Skeggs1-2/+20
2010-12-03drm/nouveau: tidy up and extend dma object creation interfacesBen Skeggs1-4/+5
2010-12-03drm/nouveau: remove some useless GETPARAMsBen Skeggs1-16/+1
2010-12-03drm/nv84: fix minor issues in PCRYPT implementationBen Skeggs1-0/+1
2010-12-03drm/nouveau: rework gpu-specific instmem interfacesBen Skeggs1-28/+28
2010-12-03drm/nv50: rework PGPIO IRQ handling and hotplug detectionBen Skeggs1-0/+4
2010-12-03drm/nouveau: move PFIFO ISR into nv04_fifo.cBen Skeggs1-5/+5
2010-12-03drm/nv50: move GPIO ISR to nv50_gpio.cBen Skeggs1-1/+1
2010-12-03drm/nouveau: Rework tile region handling.Francisco Jerez1-8/+17
2010-12-03drm/nouveau: Implement the pageflip ioctl.Francisco Jerez1-0/+3
2010-12-03drm/nouveau: Implement the vblank DRM hooks.Francisco Jerez1-5/+7
2010-12-03drm/nv50: regression fix, point NVAA/NVAC at correct PM functionsBen Skeggs1-0/+2
2010-12-03drm/nouveau: add support for MSIBen Skeggs1-6/+3
2010-12-03drm/nv84: add support for the PCRYPT engineBen Skeggs1-10/+52
2010-12-03drm/nouveau: only expose the object classes that are supported by the chipsetBen Skeggs1-7/+0
2010-12-03drm/nv40: Ignore sync-to-vblank active when waiting for idle.Francisco Jerez1-1/+7
2010-12-03drm/nouveau: Fix lock unbalance on card take down.Francisco Jerez1-1/+1
2010-12-03drm/nouveau: Refactor context destruction to avoid a lock ordering issue.Francisco Jerez1-4/+4
2010-12-03drm/nouveau: add more fine-grained locking to channel list + structuresBen Skeggs1-4/+4
2010-11-18drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hangBen Skeggs1-0/+10
2010-11-18drm/nouveau: Expose some BO usage flags to userspace.Francisco Jerez1-0/+3
2010-11-18drm/nouveau: Reduce severity of the unknown getparam error.Francisco Jerez1-2/+2
2010-10-05drm/nouveau: Use semaphores to handle inter-channel sync in hardware.Francisco Jerez1-2/+9
2010-10-05drm/nva3: split pm backend out from nv50Ben Skeggs1-3/+15
2010-09-24drm/nouveau: Refactor nouveau_temp_get() into engine pointers.Francisco Jerez1-0/+5
2010-09-24drm/nv04-nv40: import initial pm backendBen Skeggs1-0/+19
2010-09-24drm/nv50: import initial clock get/set routines + hook up pm engineBen Skeggs1-0/+5
2010-09-24drm/nouveau: import initial work on vbios performance table parsingBen Skeggs1-0/+5
2010-09-24drm/nouveau: Simplify tile region handling.Francisco Jerez1-5/+0
2010-09-24drm/nouveau: Remove implicit argument from nv_wait().Francisco Jerez1-1/+1
2010-09-24drm/nouveau: rework init ordering so nv50_instmem.c can be less badBen Skeggs1-26/+15
2010-09-24drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanityBen Skeggs1-10/+8
2010-08-06drm/nvc0: starting point for GF100 support, everything stubbedBen Skeggs1-0/+51
2010-08-06drm/nouveau: unwind on load errorsDan Carpenter1-10/+30
2010-07-26drm/nouveau: introduce gpio engineBen Skeggs1-1/+40
2010-07-26drm/nouveau: Move display init to a new nouveau_engine.Francisco Jerez1-13/+43
2010-07-26drm/nv30: Init the PFB+0x3xx memory timing regs.Francisco Jerez1-2/+2
2010-07-26drm/nv50: use correct PRAMIN flush register on original nv50Ben Skeggs1-1/+4
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