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path: root/drivers/gpu/drm/i915/intel_psr.c
AgeCommit message (Expand)AuthorFilesLines
2015-04-14drm/i915: PSR VLV: Add single frame update.Rodrigo Vivi1-0/+42
2015-04-14drm/i915: PSR: deprecate link_standby support for core platforms.Rodrigo Vivi1-16/+10
2015-04-14drm/i915: PSR: Fix DP_PSR_NO_TRAIN_ON_EXIT logicRodrigo Vivi1-4/+9
2015-04-14drm/i915: PSR: Remove wrong LINK_DISABLE.Rodrigo Vivi1-2/+1
2015-04-07drm/i915/skl: Enabling PSR2 SU with frame syncSonika Jindal1-1/+37
2015-03-30drm/i915: PSR: Keep sink state consistent with sourceDurgadoss R1-1/+1
2015-03-26drm/i915: Remove duplicated psr.active unsetRodrigo Vivi1-2/+0
2015-01-28drm/i915/skl: Enabling PSR on SkylakeSonika Jindal1-2/+24
2015-01-27drm/i915: Make intel_crtc->config a pointerAnder Conselvan de Oliveira1-4/+4
2015-01-27drm/i915: Embedded struct drm_crtc_state in intel_crtc_stateAnder Conselvan de Oliveira1-1/+1
2015-01-15drm/i915: group link_standby setup and let this info visible everywhere.Rodrigo Vivi1-10/+9
2015-01-15drm/i915: Add missing vbt check.Rodrigo Vivi1-1/+1
2015-01-15drm/i915: PSR HSW/BDW: Fix inverted logic at sink main_link_active bit.Rodrigo Vivi1-2/+2
2015-01-15drm/i915: PSR VLV/CHV: Remove condition checks that only applies to Haswell.Rodrigo Vivi1-8/+5
2015-01-15drm/i915: VLV/CHV PSR needs to exit PSR on every flush.Rodrigo Vivi1-4/+2
2014-12-03drm/i915: VLV/CHV PSR Software timer modeRodrigo Vivi1-13/+84
2014-12-03drm/i915: PSR VLV/CHV: Introduce setup, enable and disable functionsRodrigo Vivi1-25/+130
2014-12-03drm/i915: Remove intel_psr_is_enabled function.Rodrigo Vivi1-10/+0
2014-12-03drm/i915: remove PSR BDW single frame update.Rodrigo Vivi1-1/+0
2014-12-03drm/i915: PSR get full link off x standby from VBTRodrigo Vivi1-1/+1
2014-12-03drm/i915: HSW/BDW PSR Set idle_frames = VBT + 1Rodrigo Vivi1-1/+6
2014-11-17drm/i915: Add PSR docbookRodrigo Vivi1-0/+73
2014-11-17drm/i915: Introduce intel_psr.cRodrigo Vivi1-0/+408
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