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path: root/drivers/gpu/drm/i915/intel_lrc.h
AgeCommit message (Expand)AuthorFilesLines
2018-04-30drm/i915: Wrap engine->context_pin() and engine->context_unpin()Chris Wilson1-1/+1
2018-03-07drm/i915/icl: Enhanced execution list supportThomas Daniel1-0/+3
2018-01-24drm/i915/execlists: Inhibit context save/restore for the fake preempt contextChris Wilson1-0/+1
2017-11-21drm/i915: Remove i915.enable_execlists module parameterChris Wilson1-4/+0
2017-10-26drm/i915/guc: Preemption! With GuCMichał Winiarski1-1/+0
2017-10-04drm/i915/execlists: Distinguish the incomplete context notifiesChris Wilson1-0/+1
2017-09-13drm/i915/lrc: Clarify the format of the context imageMichel Thierry1-3/+22
2017-09-13drm/i915: Move the context descriptor to an inline helperChris Wilson1-2/+9
2017-08-07drm/i915: remove unused function declarationLionel Landwerlin1-1/+0
2017-04-28drm/i915: Sanitize engine context sizesJoonas Lahtinen1-2/+0
2017-03-16drm/i915: Move engine->submit_request selection to a vfuncChris Wilson1-1/+0
2017-03-03drm/i915: Generalise wait for execlists to be idleChris Wilson1-1/+0
2017-01-24drm/i915: Split intel_engine allocation and initialisationChris Wilson1-2/+0
2017-01-10drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZEChris Wilson1-1/+1
2016-12-18drm/i915: Swap if(enable_execlists) in i915_gem_request_alloc for a vfuncChris Wilson1-2/+0
2016-12-18drm/i915: Unify active context tracking between legacy/execlists/gucChris Wilson1-4/+1
2016-12-01drm/i915: Make various init functions take dev_privTvrtko Ursulin1-1/+1
2016-11-07drm/i915: Make sure engines are idle during GPU idling in LR modeImre Deak1-0/+1
2016-09-09drm/i915: Update reset path to fix incomplete requestsChris Wilson1-2/+1
2016-09-09drm/i915: Simplify ELSP queue request trackingChris Wilson1-2/+0
2016-08-03drm/i915: Unify legacy/execlists submit_execbuf callbacksChris Wilson1-5/+0
2016-08-03drm/i915: Unify request submissionChris Wilson1-0/+2
2016-08-03drm/i915: Remove obsolete engine->gpu_caches_dirtyChris Wilson1-2/+0
2016-08-03drm/i915: Unify intel_logical_ring_emit and intel_ring_emitChris Wilson1-26/+0
2016-07-21drm/i915: rename macro parameter(ring) to (engine)Dave Gordon1-8/+8
2016-07-20drm/i915: Treat ringbuffer writes as write to normal memoryChris Wilson1-3/+3
2016-07-14drm/i915: Move common engine setup into intel_engine_cs.cTvrtko Ursulin1-0/+3
2016-07-14drm/i915: Unify engine init loopTvrtko Ursulin1-1/+1
2016-06-17drm/i915: Introduce execlist context status change notificationZhi Wang1-0/+5
2016-05-24drm/i915: Merge legacy+execlists context structsChris Wilson1-1/+0
2016-05-24drm/i915: Rename struct intel_contextChris Wilson1-4/+6
2016-05-09drm/i915: Store a i915 backpointer from engine, and use itChris Wilson1-1/+2
2016-04-28drm/i915: Stop tracking execlists retired requestsTvrtko Ursulin1-1/+1
2016-04-28drm/i915: Move the magical deferred context allocation into the requestChris Wilson1-2/+0
2016-04-28drm/i915: Replace the pinned context address with its unique IDChris Wilson1-3/+0
2016-04-28drm/i915: Unify intel_ring_begin()Chris Wilson1-1/+0
2016-04-14drm/i915: Disentangle i915_drv.h includesChris Wilson1-0/+2
2016-04-13drm/i915: Use new i915_gem_object_pin_map for LRCTvrtko Ursulin1-2/+5
2016-04-12drm/i915: Only grab correct forcewake for the engine with execlistsTvrtko Ursulin1-0/+1
2016-04-04drm/i915: Move execlists irq handler to a bottom halfTvrtko Ursulin1-1/+0
2016-03-16drm/i915: Rename intel_engine_cs function parametersTvrtko Ursulin1-8/+8
2016-01-28drm/i915: Make LRC (un)pinning work on context and engineTvrtko Ursulin1-1/+2
2016-01-18drm/i915: Do not call API requiring struct_mutex where it is not availableTvrtko Ursulin1-1/+3
2016-01-07drm/i915: Cleanup some of the CSB handlingBen Widawsky1-2/+16
2016-01-05drm/i915/guc: Expose (intel)_lr_context_size()Dave Gordon1-0/+1
2015-12-04Revert "drm/i915: Extend LRC pinning to cover GPU context writeback"Daniel Vetter1-1/+0
2015-12-03drm/i915: Extend LRC pinning to cover GPU context writebackNick Hoath1-0/+1
2015-11-23Merge tag 'v4.4-rc2' into drm-intel-next-queuedDaniel Vetter1-0/+2
2015-11-18drm/i915: Type safe register read/writeVille Syrjälä1-9/+9
2015-11-18drm/i915: Add functions to emit register offsets to the ringVille Syrjälä1-0/+5
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