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path: root/drivers/gpu/drm/i915/i915_cmd_parser.c
AgeCommit message (Expand)AuthorFilesLines
2018-12-13drm/i915: replace IS_GEN<N> with IS_GEN(..., N)Lucas De Marchi1-1/+1
2018-02-05drm/i915/cmdparser: Do not check past the cmd length.Michal Srb1-0/+6
2018-02-05drm/i915/cmdparser: Check reg_table_count before derefencing.Michal Srb1-2/+2
2017-11-29drm/i915: Move engine->needs_cmd_parser to engine->flagsTvrtko Ursulin1-3/+4
2017-11-07drm/i915: Silence smatch for cmdparserChris Wilson1-10/+3
2017-08-29drm/i915: Recreate vmapping even when the object is pinnedChris Wilson1-1/+1
2017-05-17drm/i915: Redefine ptr_pack_bits() and friendsChris Wilson1-1/+1
2017-04-11drm/i915: Rename intel_engine_cs.exec_id to uabi_idChris Wilson1-4/+4
2017-03-10drm/i915/cmdparser: Limit clflush to active cachelinesChris Wilson1-11/+14
2017-01-06drm/i915: Consolidate checks for memcpy-from-wc supportChris Wilson1-1/+1
2016-11-24drm/i915: Use the precomputed value for whether to enable command parsingChris Wilson1-22/+1
2016-11-24drm/i915: kick out cmd_parser specific structs from i915_drv.hMatthew Auld1-0/+96
2016-11-24drm/i915: cleanup use of INSTR_CLIENT_MASKMatthew Auld1-3/+3
2016-11-22drm/i915: don't whitelist oacontrol in cmd parserRobert Bragg1-37/+5
2016-11-22drm/i915: return EACCES for check_cmd() failuresRobert Bragg1-2/+5
2016-11-22drm/i915: rename OACONTROL GEN7_OACONTROLRobert Bragg1-2/+2
2016-10-28drm/i915: Refactor object page APIChris Wilson1-1/+1
2016-10-14drm/i915: Allocate intel_engine_cs structure only for the enabled enginesAkash Goel1-1/+2
2016-09-16drm/i915: use NULL for NULL pointersJani Nikula1-1/+1
2016-08-19drm/i915/cmdparser: Accelerate copies from WC memoryChris Wilson1-27/+43
2016-08-19drm/i915/cmdparser: Use binary search for faster register lookupChris Wilson1-22/+20
2016-08-19drm/i915/cmdparser: Check for SKIP descriptors firstChris Wilson1-0/+3
2016-08-19drm/i915/cmdparser: Compare against the previous command descriptorChris Wilson1-7/+14
2016-08-19drm/i915/cmdparser: Improve hash functionChris Wilson1-20/+31
2016-08-19drm/i915/cmdparser: Only cache the dst vmapChris Wilson1-14/+19
2016-08-19drm/i915/cmdparser: Use cached vmappingsChris Wilson1-80/+47
2016-08-19drm/i915/cmdparser: Add the TIMESTAMP register for the other enginesChris Wilson1-0/+5
2016-08-19drm/i915/cmdparser: Make initialisation failure non-fatalChris Wilson1-13/+14
2016-08-19drm/i915: Extract i915_gem_obj_prepare_shmem_write()Chris Wilson1-2/+2
2016-07-27drm/i915/cmdparser: Remove stray intel_engine_cs *ringChris Wilson1-35/+39
2016-06-06drm/i915: Fix a buch of kerneldoc warningsTvrtko Ursulin1-4/+5
2016-05-09drm/i915: Store a i915 backpointer from engine, and use itChris Wilson1-6/+6
2016-05-09drm/i915: Allow MI_LOAD_REGISTER_REG between whitelisted registers.Kenneth Graunke1-2/+15
2016-05-05drm/i915: Report command parser version 0 if disabledChris Wilson1-1/+14
2016-03-21drm/i915: Bump command parser version for new whitelisted registersJordan Justen1-1/+2
2016-03-21drm/i915: Add Haswell CS GPR registers to whitelistJordan Justen1-0/+16
2016-03-21drm/i915: Move Haswell registers to separate whitelist tableJordan Justen1-0/+4
2016-03-21drm/i915: Use an array of register tables in command parserJordan Justen1-29/+72
2016-03-21drm/i915: Add TIMESTAMP to register whitelistJordan Justen1-0/+1
2016-03-16drm/i915: Rename intel_engine_cs function parametersTvrtko Ursulin1-61/+61
2015-11-18drm/i915: Type safe register read/writeVille Syrjälä1-4/+4
2015-11-18drm/i915: Make the cmd parser 64bit regs explicitVille Syrjälä1-12/+17
2015-10-06drm/i915: Add GEN7_GPGPU_DISPATCHDIMX/Y/Z to the register whitelistJordan Justen1-1/+5
2015-09-04drm/i915: Fix cmdparser STORE/LOAD command descriptorsChris Wilson1-2/+2
2015-09-01drm/i915: Bump command parser version number.Francisco Jerez1-1/+2
2015-08-26drm/i915: Change SRM, LRM instructions to use correct lengthArun Siluvery1-5/+5
2015-07-29drm/i915: Fix command parser table validatorHanno Böck1-1/+1
2015-07-29drm/i915: Properly sort MI coomand tableHanno Böck1-1/+1
2015-07-06drm/i915: Update WaFlushCoherentL3CacheLinesAtContextSwitchArun Siluvery1-3/+3
2015-06-15drm/i915: Add SCRATCH1 and ROW_CHICKEN3 to the register whitelist.Francisco Jerez1-0/+7
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