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path: root/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
AgeCommit message (Expand)AuthorFilesLines
2018-08-14drm/amdgpu/vce: VCE entity initialization relies on ring initializtionEmily Deng1-0/+2
2018-07-13drm/amd: Use newly added interrupt source defs for VI v3.Andrey Grodzovsky1-1/+2
2018-07-06drm/amdgpu/vce: simplify vce instance setupAlex Deucher1-8/+12
2018-07-06drm/amdgpu: fix swapped emit_ib_size in vce3Alex Deucher1-2/+2
2018-05-15drm/amdgpu: add VEGAM to VCE harvest configLeo Liu1-1/+2
2018-05-15drm/amdgpu: Add APU support in vi_set_vce_clocksRex Zhu1-2/+2
2018-02-19drm/amdgpu: separate PASID mapping from VM flush v2Christian König1-2/+1
2018-02-19drm/amdgpu: forward pasid to backend flush implementationsChristian König1-1/+2
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König1-5/+5
2017-11-02drm/amdgpu: allow harvesting check for Polaris VCELeo Liu1-6/+6
2017-05-31drm/amdgpu: Program ring for vce instance 1 at its register spaceLeo Liu1-27/+68
2017-04-04drm/amdgpu: various cleanups for uvd/vce.Rex Zhu1-15/+3
2017-03-30drm/amd/powerplay: add a new register define for APU in VI.Rex Zhu1-2/+6
2017-03-30drm/amdgpu: refine vce_3.0 code.Rex Zhu1-9/+7
2017-03-30drm/amdgpu/ih: store the full context idAlex Deucher1-3/+3
2017-03-30drm/amdgpu: switch ih handling to two levels (v3)Alex Deucher1-1/+1
2017-03-30drm/amdgpu: change wptr to 64 bits (v2)Ken Wang1-11/+13
2017-02-13drm/amdgpu: read hw register to check pg status.Rex Zhu1-3/+2
2017-02-13drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL registerAlan Harrison1-0/+2
2017-02-09drm/amdgpu: refine vce3.0 code and related powerplay pg code.Rex Zhu1-11/+6
2017-01-27drm/amdgpu: refine vce3.0 initialize.Rex Zhu1-17/+4
2017-01-27drm/amdgpu: add get clockgating_state method for vce v3Huang Rui1-4/+36
2017-01-17drm/amdgpu: fix program vce instance logic error.Rex Zhu1-9/+16
2017-01-17drm/amdgpu: fix bug set incorrect value to vce registerRex Zhu1-1/+1
2017-01-07drm/amd/amdgpu: add Polaris12 support (v3)Junwei Zhang1-2/+3
2016-12-07drm/amdgpu: enable VCE clockgating in Polaris-10/11Maruthi Srinivas Bayyavarapu1-1/+1
2016-11-07Backmerge tag 'v4.9-rc4' into drm-nextDave Airlie1-0/+6
2016-10-25drm/amdgpu: add VCE VM session trackingChristian König1-0/+1
2016-10-25drm/amdgpu: rework IP block registration (v2)Alex Deucher1-1/+28
2016-10-25drm/amdgpu: move align_mask and nop into ring funcs as well (v2)Christian König1-2/+5
2016-10-25drm/amdgpu: move the ring type into the funcs structure (v2)Christian König1-1/+3
2016-10-25drm/amdgpu: move IB and frame size directly into the engine descriptionChristian König1-25/+9
2016-10-25drm/amdgpu: remove explicit NULL init for parse_csChristian König1-1/+0
2016-10-25drm/amdgpu/vce3: only enable 3 rings on new enough firmware (v2)Alex Deucher1-0/+6
2016-10-14drm/amdgpu: fix amdgpu_need_full_reset (v2)Alex Deucher1-8/+7
2016-09-27drm/amdgpu: bypass vce clock if vce is idle on Fiji.Rex Zhu1-1/+2
2016-09-16drm/amdgpu/vce3: add ring callbacks for ib and dma frame sizeAlex Deucher1-0/+25
2016-09-13drm/amdgpu: add VCE VM mode supportMaruthi Srinivas Bayyavarapu1-3/+60
2016-08-25drm/amdgpu: add vce bypass mode for tonga.Rex Zhu1-1/+2
2016-08-25drm/amdgpu: refine function name for consistencyRex Zhu1-2/+2
2016-08-25drm/amdgpu/vce3: add support for third vce ringAlex Deucher1-4/+18
2016-08-25drm/amdgpu: track the number of vce ringsAlex Deucher1-19/+18
2016-08-16drm/amd/amdgpu: add mutex in check_soft for VCE v3Tom St Denis1-0/+2
2016-08-16drm/amd/amdgpu: Cleanup register access in VCE v3Tom St Denis1-102/+43
2016-08-08drm/amdgpu: enable VCE soft resetChunming Zhou1-3/+0
2016-08-08drm/amdgpu: remove RB1_BUSY bit checkingRex Zhu1-1/+5
2016-08-08drm/amdgpu: fix harvest config checking in vce3 check_soft_resetChunming Zhou1-3/+0
2016-08-08drm/amd/amdgpu: Don't set VCE CG in startupTom St Denis1-4/+0
2016-08-08drm/amd/amdgpu: Fix VCE CG order and resume defaultsTom St Denis1-24/+12
2016-08-08drm/amd/amdgpu: fix indentation in vce3 CGTom St Denis1-6/+7
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