index
:
BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
cxl
/
cxl.h
Age
Commit message (
Expand
)
Author
Files
Lines
2021-08-06
cxl/pci: Simplify register setup
Ben Widawsky
1
-1
/
+0
2021-06-16
cxl/pmem: Register 'pmem' / cxl_nvdimm devices
Dan Williams
1
-1
/
+11
2021-06-16
cxl/pmem: Add initial infrastructure for pmem support
Dan Williams
1
-0
/
+24
2021-06-16
cxl/core: Add cxl-bus driver infrastructure
Dan Williams
1
-0
/
+22
2021-06-12
cxl/hdm: Fix decoder count calculation
Ben Widawsky
1
-0
/
+7
2021-06-10
cxl/acpi: Introduce cxl_decoder objects
Dan Williams
1
-0
/
+63
2021-06-10
cxl/acpi: Add downstream port data to cxl_port instances
Dan Williams
1
-0
/
+21
2021-06-10
cxl/acpi: Introduce the root of a cxl_port topology
Dan Williams
1
-0
/
+31
2021-06-06
cxl/pci: Add HDM decoder capabilities
Ben Widawsky
1
-6
/
+59
2021-06-06
cxl/pci: Map registers based on capabilities
Ira Weiny
1
-5
/
+28
2021-05-15
cxl/core: Refactor CXL register lookup for bridge reuse
Dan Williams
1
-0
/
+3
2021-05-15
cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devices
Dan Williams
1
-0
/
+32
2021-05-15
cxl/mem: Move some definitions to mem.h
Dan Williams
1
-57
/
+0
2021-02-17
cxl/mem: Enable commands via CEL
Ben Widawsky
1
-0
/
+2
2021-02-17
cxl/mem: Register CXL memX devices
Dan Williams
1
-0
/
+3
2021-02-17
cxl/mem: Find device capabilities
Ben Widawsky
1
-0
/
+90