Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-03-31 | clk: socfpga: use clk_hw_register for a5/c5 | Dinh Nguyen | 1 | -4/+4 |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner | 1 | -11/+1 |
2015-08-25 | clk: socfpga: Add a second parent option for the dbg_base_clk | Dinh Nguyen | 1 | -4/+14 |
2015-07-28 | clk: socfpga: switch to GENMASK() | Andy Shevchenko | 1 | -1/+1 |
2015-07-20 | clk: socfpga: Remove clk.h and clkdev.h includes | Stephen Boyd | 1 | -2/+1 |
2015-05-15 | clk: socfpga: Silence sparse warning | Stephen Boyd | 1 | -1/+1 |
2014-05-12 | clk: socfpga: add divider registers to the main pll outputs | Dinh Nguyen | 1 | -3/+19 |
2014-02-19 | clk: socfpga: split clk code | Steffen Trumtrar | 1 | -0/+94 |