BMC/Intel-BMC/linux.git - Intel OpenBMC Linux kernel source tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2021-03-21	clk: rockchip: support more core div setting	Elaine Zhang	1	-3/+4
2020-08-19	clk: rockchip: Fix initialization of mux_pll_src_4plls_p	Nathan Chancellor	1	-1/+1
2020-04-13	clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks	Justin Swartz	1	-13/+4
2019-07-17	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	1	-1/+2
2019-06-27	clk: rockchip: export HDMIPHY clock on rk3228	Heiko Stuebner	1	-1/+1
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	Thomas Gleixner	1	-10/+1
2019-05-20	clk: rockchip: add 1.464GHz cpu-clock rate to rk3228	Justin Swartz	1	-0/+1
2019-05-15	clk: Remove io.h from clk-provider.h	Stephen Boyd	1	-0/+1
2018-03-23	clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228	Shawn Lin	1	-1/+1
2017-08-22	clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id	Elaine Zhang	1	-1/+1
2017-06-02	clk: rockchip: mark noc and some special clk as critical on rk3228	Elaine Zhang	1	-1/+29
2017-06-02	clk: rockchip: export more rk3228 clocks ids	Elaine Zhang	1	-46/+46
2017-05-17	clk: rockchip: fix up the RK3228 clk cpu setting table	Elaine Zhang	1	-12/+30
2016-07-01	clk: rockchip: export rk3228 MAC clocks	Xing Zheng	1	-11/+11
2016-07-01	clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclk	Xing Zheng	1	-3/+3
2016-07-01	clk: rockchip: export rk3228 audio clocks	Xing Zheng	1	-4/+4
2016-07-01	clk: rockchip: include rk3228 downstream muxes into fractional dividers	Xing Zheng	1	-29/+52
2016-06-22	clk: rockchip: fix incorrect rk3228 clock registers	Xing Zheng	1	-9/+9
2016-03-27	clk: rockchip: release io resource when failing to init clk	Shawn Lin	1	-0/+1
2016-03-27	clk: rockchip: Add support for multiple clock providers	Xing Zheng	1	-5/+12
2016-03-27	clk: rockchip: allow varying mux parameters for cpuclk pll-sources	Xing Zheng	1	-0/+3
2016-02-26	clk: rockchip: set the clock ids for RK3228 HDMI	Yakir Yang	1	-4/+4
2016-02-26	clk: rockchip: set the clock ids for RK3228 VOP	Yakir Yang	1	-3/+3
2016-02-26	clk: rockchip: add the tsadc clocks found on rk3228 SoCs	Caesar Wang	1	-2/+2
2016-02-04	clk: rockchip: convert manually created factor clocks to the new type	Heiko Stuebner	1	-27/+5
2016-01-28	clk: rockchip: fix wrong mmc phase shift for rk3228	Shawn Lin	1	-3/+3
2015-12-21	clk: rockchip: only enter pll slow-mode directly before reboots on rk3288	Heiko Stuebner	1	-1/+1
2015-12-12	clk: rockchip: add clock controller for rk3228	Jeffy Chen	1	-0/+678