| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-11-02 | clk: mediatek: add the option for determining PLL source clock | Chen Zhong | 1 | -1/+4 |
| 2017-11-02 | clk: mediatek: Add MT2712 clock support | weiyi.lu@mediatek.com | 1 | -2/+11 |
| 2016-11-09 | clk: mediatek: Add MT2701 clock support | Shunli Wang | 1 | -0/+1 |
| 2016-08-19 | clk: mediatek: remove __init from clk registration functions | James Liao | 1 | -1/+1 |
| 2015-10-01 | clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS | James Liao | 1 | -6/+1 |
| 2015-07-28 | clk: mediatek: Add MT8173 MMPLL change rate support | James Liao | 1 | -3/+15 |
| 2015-07-28 | clk: mediatek: Fix calculation of PLL rate settings | James Liao | 1 | -2/+2 |
| 2015-07-28 | clk: mediatek: Fix PLL registers setting flow | James Liao | 1 | -9/+12 |
| 2015-05-20 | clk: mediatek: Initialize clk_init_data | Ricky Liang | 1 | -1/+1 |
| 2015-05-06 | clk: mediatek: Add initial common clock support for Mediatek SoCs. | James Liao | 1 | -0/+332 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |